linux-kernel - [PATCH 3/3] hwmon: (coretemp) Use a model-specific bitmask to read registers

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Message-Id: <20240406010416.4821-4-ricardo.neri-calderon@linux.intel.com>
Date: Fri,  5 Apr 2024 18:04:16 -0700
From: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
To: "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	Zhang Rui <rui.zhang@...el.com>,
	Jean Delvare <jdelvare@...e.com>,
	Guenter Roeck <linux@...ck-us.net>
Cc: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
	Lukasz Luba <lukasz.luba@....com>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	linux-pm@...r.kernel.org,
	linux-hwmon@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Ricardo Neri <ricardo.neri@...el.com>
Subject: [PATCH 3/3] hwmon: (coretemp) Use a model-specific bitmask to read registers

The Intel Software Development manual defines states the temperature
digital readout as the bits [22:16] of the IA32_[PACKAGE]_THERM_STATUS
registers. In recent processor, however, the range is [23:16]. Use a
model-specific bitmask to extract the temperature readout correctly.

Instead of re-implementing model checks, extract the correct bitmask
using the intel_tcc library. Add an 'imply' weak reverse dependency on
CONFIG_INTEL_TCC. This captures the dependency and lets user to unselect
them if they are so inclined. In such case, the bitmask used for the
digital readout is [22:16] as specified in the Intel Software Developer's
manual.

Signed-off-by: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
---
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: Lukasz Luba <lukasz.luba@....com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Cc: linux-hwmon@...r.kernel.org
Cc: linux-pm@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
Cc: stable@...r.kernel.org # v6.7+
---
 drivers/hwmon/Kconfig    | 1 +
 drivers/hwmon/coretemp.c | 6 +++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 83945397b6eb..11d72b3009bf 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -847,6 +847,7 @@ config SENSORS_I5500
 config SENSORS_CORETEMP
 	tristate "Intel Core/Core2/Atom temperature sensor"
 	depends on X86
+	imply INTEL_TCC
 	help
 	  If you say yes here you get support for the temperature
 	  sensor inside your CPU. Most of the family 6 CPUs
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 616bd1a5b864..5632e1b1dfb1 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -17,6 +17,7 @@
 #include <linux/sysfs.h>
 #include <linux/hwmon-sysfs.h>
 #include <linux/err.h>
+#include <linux/intel_tcc.h>
 #include <linux/mutex.h>
 #include <linux/list.h>
 #include <linux/platform_device.h>
@@ -404,6 +405,8 @@ static ssize_t show_temp(struct device *dev,
 	tjmax = get_tjmax(tdata, dev);
 	/* Check whether the time interval has elapsed */
 	if (time_after(jiffies, tdata->last_updated + HZ)) {
+		u32 mask = intel_tcc_get_temp_mask(is_pkg_temp_data(tdata));
+
 		rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
 		/*
 		 * Ignore the valid bit. In all observed cases the register
@@ -411,7 +414,7 @@ static ssize_t show_temp(struct device *dev,
 		 * Return it instead of reporting an error which doesn't
 		 * really help at all.
 		 */
-		tdata->temp = tjmax - ((eax >> 16) & 0x7f) * 1000;
+		tdata->temp = tjmax - ((eax >> 16) & mask) * 1000;
 		tdata->last_updated = jiffies;
 	}
 
@@ -838,4 +841,5 @@ module_exit(coretemp_exit)
 
 MODULE_AUTHOR("Rudolf Marek <r.marek@...embler.cz>");
 MODULE_DESCRIPTION("Intel Core temperature monitor");
+MODULE_IMPORT_NS(INTEL_TCC);
 MODULE_LICENSE("GPL");
-- 
2.34.1