lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Sun, 7 Apr 2024 08:24:40 +0000
From: "Zhang, Rui" <rui.zhang@...el.com>
To: "linux@...ck-us.net" <linux@...ck-us.net>,
	"ricardo.neri-calderon@...ux.intel.com"
	<ricardo.neri-calderon@...ux.intel.com>, "Wysocki, Rafael J"
	<rafael.j.wysocki@...el.com>, "jdelvare@...e.com" <jdelvare@...e.com>
CC: "srinivas.pandruvada@...ux.intel.com"
	<srinivas.pandruvada@...ux.intel.com>, "lukasz.luba@....com"
	<lukasz.luba@....com>, "linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
	"linux-hwmon@...r.kernel.org" <linux-hwmon@...r.kernel.org>,
	"daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "Neri,
 Ricardo" <ricardo.neri@...el.com>
Subject: Re: [PATCH 3/3] hwmon: (coretemp) Use a model-specific bitmask to
 read registers

On Fri, 2024-04-05 at 18:04 -0700, Ricardo Neri wrote:
> The Intel Software Development manual defines states the temperature

I failed to parse this, is the above "states" redundant?

[...]

> digital readout as the bits [22:16] of the
> IA32_[PACKAGE]_THERM_STATUS
> registers. In recent processor, however, the range is [23:16]. Use a
> model-specific bitmask to extract the temperature readout correctly.
> 
> diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
> index 616bd1a5b864..5632e1b1dfb1 100644
> --- a/drivers/hwmon/coretemp.c
> +++ b/drivers/hwmon/coretemp.c
> @@ -17,6 +17,7 @@
>  #include <linux/sysfs.h>
>  #include <linux/hwmon-sysfs.h>
>  #include <linux/err.h>
> +#include <linux/intel_tcc.h>
>  #include <linux/mutex.h>
>  #include <linux/list.h>
>  #include <linux/platform_device.h>
> @@ -404,6 +405,8 @@ static ssize_t show_temp(struct device *dev,
>         tjmax = get_tjmax(tdata, dev);
>         /* Check whether the time interval has elapsed */
>         if (time_after(jiffies, tdata->last_updated + HZ)) {
> +               u32 mask =
> intel_tcc_get_temp_mask(is_pkg_temp_data(tdata));
> +
>                 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax,
> &edx);
>                 /*
>                  * Ignore the valid bit. In all observed cases the
> register
> @@ -411,7 +414,7 @@ static ssize_t show_temp(struct device *dev,
>                  * Return it instead of reporting an error which
> doesn't
>                  * really help at all.
>                  */
> -               tdata->temp = tjmax - ((eax >> 16) & 0x7f) * 1000;
> +               tdata->temp = tjmax - ((eax >> 16) & mask) * 1000;
>                 tdata->last_updated = jiffies;
>         }
> 
Besides this one, we can also convert to use intel_tcc_get_tjmax() in
get_tjmax().

thanks,
rui

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ