diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
index a6bc1bdb3d0d..926618d0e622 100644
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
@@ -46,6 +46,7 @@ struct meson_dw_mipi_dsi {
 	struct clk *bit_clk;
 	struct clk *px_clk;
 	struct reset_control *top_rst;
+	bool px_clk_enabled;
 };
 
 #define encoder_to_meson_dw_mipi_dsi(x) \
@@ -87,6 +88,11 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
 		return ret;
 	}
 
+	if (mipi_dsi->px_clk_enabled) {
+		clk_disable(mipi_dsi->px_clk);
+		mipi_dsi->px_clk_enabled = false;
+	}
+
 	/* Make sure the rate of the bit clock is not modified by someone else */
 	ret = clk_rate_exclusive_get(mipi_dsi->bit_clk);
 	if (ret) {
@@ -103,6 +109,14 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
 		return ret;
 	}
 
+	ret = clk_prepare_enable(mipi_dsi->px_clk);
+	if (ret) {
+		dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret);
+		return ret;
+	}
+
+	mipi_dsi->px_clk_enabled = true;
+
 	switch (mipi_dsi->dsi_device->format) {
 	case MIPI_DSI_FMT_RGB888:
 		dpi_data_format = DPI_COLOR_24BIT;
@@ -287,7 +301,7 @@ static int meson_dw_mipi_dsi_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, ret, "Unable to get enabled bit_clk\n");
 	}
 
-	mipi_dsi->px_clk = devm_clk_get_enabled(dev, "px");
+	mipi_dsi->px_clk = devm_clk_get_prepared(dev, "px");
 	if (IS_ERR(mipi_dsi->px_clk))
 		return dev_err_probe(dev, PTR_ERR(mipi_dsi->px_clk),
 				     "Unable to get enabled px_clk\n");
@@ -327,6 +341,9 @@ static void meson_dw_mipi_dsi_remove(struct platform_device *pdev)
 {
 	struct meson_dw_mipi_dsi *mipi_dsi = platform_get_drvdata(pdev);
 
+	if (mipi_dsi->px_clk_enabled)
+		clk_disable(mipi_dsi->px_clk);
+
 	dw_mipi_dsi_remove(mipi_dsi->dmd);
 }