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Message-ID: <c3d05b3e-f784-4606-9634-52dc6feee318@collabora.com>
Date: Wed, 10 Apr 2024 09:43:34 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Hsin-Te Yuan <yuanhsinte@...omium.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Matthias Brugger
<matthias.bgg@...il.com>, NĂcolas F. R. A. Prado
<nfraprado@...labora.com>, Bernhard Rosenkränzer
<bero@...libre.com>, Balsam CHIHI <bchihi@...libre.com>,
Alexandre Mergnat <amergnat@...libre.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH] arm64: dts: mediatek: mt8192: Add missing trip point in
thermal zone
Il 10/04/24 08:20, Hsin-Te Yuan ha scritto:
> Add the missing passive trip point which is expected by kernel.
>
> Fixes: c7a728051f4e ("arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones")
> Signed-off-by: Hsin-Te Yuan <yuanhsinte@...omium.org>
Sorry, I don't understand what you're trying to solve here.
All of the thermal zones in mt8192.dtsi already do have a passive trip point
which is also used in cooling-maps.
Can you please describe the issue?
Thanks,
Angelo
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 40 ++++++++++++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 05e401670bced..08d8bccc84669 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -1959,6 +1959,11 @@ cpu0-thermal {
> thermal-sensors = <&lvts_mcu MT8192_MCU_LITTLE_CPU0>;
>
> trips {
> + cpu0_thres: trip-point {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> cpu0_alert: trip-alert {
> temperature = <85000>;
> hysteresis = <2000>;
> @@ -1989,6 +1994,11 @@ cpu1-thermal {
> thermal-sensors = <&lvts_mcu MT8192_MCU_LITTLE_CPU1>;
>
> trips {
> + cpu1_thres: trip-point {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> cpu1_alert: trip-alert {
> temperature = <85000>;
> hysteresis = <2000>;
> @@ -2019,6 +2029,11 @@ cpu2-thermal {
> thermal-sensors = <&lvts_mcu MT8192_MCU_LITTLE_CPU2>;
>
> trips {
> + cpu2_thres: trip-point {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> cpu2_alert: trip-alert {
> temperature = <85000>;
> hysteresis = <2000>;
> @@ -2049,6 +2064,11 @@ cpu3-thermal {
> thermal-sensors = <&lvts_mcu MT8192_MCU_LITTLE_CPU3>;
>
> trips {
> + cpu3_thres: trip-point {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> cpu3_alert: trip-alert {
> temperature = <85000>;
> hysteresis = <2000>;
> @@ -2079,6 +2099,11 @@ cpu4-thermal {
> thermal-sensors = <&lvts_mcu MT8192_MCU_BIG_CPU0>;
>
> trips {
> + cpu4_thres: trip-point {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> cpu4_alert: trip-alert {
> temperature = <85000>;
> hysteresis = <2000>;
> @@ -2109,6 +2134,11 @@ cpu5-thermal {
> thermal-sensors = <&lvts_mcu MT8192_MCU_BIG_CPU1>;
>
> trips {
> + cpu5_thres: trip-point {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> cpu5_alert: trip-alert {
> temperature = <85000>;
> hysteresis = <2000>;
> @@ -2139,6 +2169,11 @@ cpu6-thermal {
> thermal-sensors = <&lvts_mcu MT8192_MCU_BIG_CPU2>;
>
> trips {
> + cpu6_thres: trip-point {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> cpu6_alert: trip-alert {
> temperature = <85000>;
> hysteresis = <2000>;
> @@ -2169,6 +2204,11 @@ cpu7-thermal {
> thermal-sensors = <&lvts_mcu MT8192_MCU_BIG_CPU3>;
>
> trips {
> + cpu7_thres: trip-point {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> cpu7_alert: trip-alert {
> temperature = <85000>;
> hysteresis = <2000>;
>
> ---
> base-commit: 20cb38a7af88dc40095da7c2c9094da3873fea23
> change-id: 20240410-upstream-torvalds-master-40aeff5416c7
>
> Best regards,
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