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Message-ID: <3ee70b6c-3399-43f9-8934-cb5a0e51f006@intel.com>
Date: Thu, 11 Apr 2024 07:44:43 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Xi Ruoyao <xry111@...111.site>, Dave Hansen
<dave.hansen@...ux.intel.com>, Michael Kelley <mhklinux@...look.com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Cc: Andy Lutomirski <luto@...nel.org>, Peter Zijlstra <peterz@...radead.org>,
Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>,
x86@...nel.org, linux-kernel@...r.kernel.org,
Sean Christopherson <seanjc@...gle.com>,
Andrew Cooper <andrew.cooper3@...rix.com>
Subject: Re: [PATCH v6] x86/mm: Don't disable INVLPG if "incomplete Global
INVLPG flushes" is fixed by microcode or the kernel is running in a
hypervisor
On 4/11/24 03:48, Xi Ruoyao wrote:
> + /*
> + * The Intel errata claims: "this erratum does not apply in VMX
> + * non-root operation. It applies only when PCIDs are enabled
> + * and either in VMX root operation or outside VMX operation."
> + * So we are safe if we are surely running in a hypervisor.
> + */
When you revise this, could you please work to make this more succinct?
The Intel language on these things tends to be a bit flowery and is not
always well-suited for the kernel.
Also, saying that the erratum "claims" this casts doubt on it. That's
counterproductive. I believe the current documentation is correct. My
original ce0b15d11ad8 ("x86/mm: Avoid incomplete Global INVLPG flushes")
should have considered virtualized systems immune to this issue.
I agree that it sounds weird. It _is_ weird that systems running under
hypervisors aren't affected. But that's all it is: a weird bug. The
documentation is correct.
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