[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240411064858.3232574-5-liaochang1@huawei.com>
Date: Thu, 11 Apr 2024 06:48:53 +0000
From: Liao Chang <liaochang1@...wei.com>
To: <catalin.marinas@....com>, <will@...nel.org>, <maz@...nel.org>,
<oliver.upton@...ux.dev>, <james.morse@....com>, <suzuki.poulose@....com>,
<yuzenghui@...wei.com>, <tglx@...utronix.de>, <mark.rutland@....com>,
<ardb@...nel.org>, <broonie@...nel.org>, <liaochang1@...wei.com>,
<anshuman.khandual@....com>, <miguel.luis@...cle.com>, <joey.gouly@....com>,
<ryan.roberts@....com>, <jeremy.linton@....com>,
<daniel.thompson@...aro.org>, <sumit.garg@...aro.org>, <liwei391@...wei.com>,
<peterz@...radead.org>, <jpoimboe@...nel.org>, <ericchancf@...gle.com>,
<kristina.martsenko@....com>, <robh@...nel.org>,
<scott@...amperecomputing.com>, <songshuaishuai@...ylab.org>,
<shijie@...amperecomputing.com>, <bhe@...hat.com>,
<akpm@...ux-foundation.org>, <horms@...nel.org>,
<rmk+kernel@...linux.org.uk>, <Jonathan.Cameron@...wei.com>,
<takakura@...inux.co.jp>, <dianders@...omium.org>, <swboyd@...omium.org>,
<frederic@...nel.org>, <reijiw@...gle.com>, <ruanjinjie@...wei.com>
CC: <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<kvmarm@...ts.linux.dev>
Subject: [PATCH v2 4/9] arm64/cpufeature: Simplify detect PE support for FEAT_NMI
From: Jinjie Ruan <ruanjinjie@...wei.com>
Simplify the Non-maskable Interrupts feature implementation with
ARM64_CPUID_FIELDS macro.
Signed-off-by: Jinjie Ruan <ruanjinjie@...wei.com>
Signed-off-by: Liao Chang <liaochang1@...wei.com>
---
arch/arm64/kernel/cpufeature.c | 12 ++----------
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index fb9e52c84fda..99c3bc74008d 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2905,24 +2905,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.desc = "Non-maskable Interrupts present",
.capability = ARM64_HAS_NMI,
.type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
- .sys_reg = SYS_ID_AA64PFR1_EL1,
- .sign = FTR_UNSIGNED,
- .field_pos = ID_AA64PFR1_EL1_NMI_SHIFT,
- .field_width = 4,
- .min_field_value = ID_AA64PFR1_EL1_NMI_IMP,
.matches = has_cpuid_feature,
+ ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, NMI, IMP)
},
{
.desc = "Non-maskable Interrupts enabled",
.capability = ARM64_USES_NMI,
.type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
- .sys_reg = SYS_ID_AA64PFR1_EL1,
- .sign = FTR_UNSIGNED,
- .field_pos = ID_AA64PFR1_EL1_NMI_SHIFT,
- .field_width = 4,
- .min_field_value = ID_AA64PFR1_EL1_NMI_IMP,
.matches = use_nmi,
.cpu_enable = nmi_enable,
+ ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, NMI, IMP)
},
#endif
{},
--
2.34.1
Powered by blists - more mailing lists