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Message-Id: <20240412151258.9171-1-jgross@suse.com>
Date: Fri, 12 Apr 2024 17:12:54 +0200
From: Juergen Gross <jgross@...e.com>
To: linux-kernel@...r.kernel.org,
x86@...nel.org
Cc: Juergen Gross <jgross@...e.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>
Subject: [PATCH v2 0/4] x86: correctly handle NX and RW bit testing
When the processor is detecting a set NX bit on any page table level
when doing a page table walk, the resulting page will not be suitable
for code execution.
A similar approach is taken for the RW bit: all page table levels need
to have the RW bit set in order to result in a writable page.
Unfortunately the kernel is only looking at the leaf page table entry
for deciding whether e.g. a writable page is executable or not.
Fix that by calculating the effective NX and RW bits over all page
table levels when doing a software address lookup, mimicking the
hardware behavior.
Changes in V2:
- split the patch into multiple patches
Juergen Gross (4):
x86/pat: introduce lookup_address_in_pgd_attr()
x86/mm: use lookup_address_in_pgd_attr() in show_fault_oops()
x86/pat: restructure _lookup_address_cpa()
x86/pat: fix W^X violation false-positives when running as Xen PV
guest
arch/x86/include/asm/pgtable_types.h | 2 +
arch/x86/mm/fault.c | 7 +--
arch/x86/mm/pat/set_memory.c | 68 ++++++++++++++++++++++------
3 files changed, 60 insertions(+), 17 deletions(-)
--
2.35.3
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