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Message-ID: <273slx5qkz6ja5qlfjgcaukuzifzsxkdabsld3qodvxaekbzet@ipir56a6afj3>
Date: Fri, 12 Apr 2024 18:09:13 +0200
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Shawn Lin <shawn.lin@...k-chips.com>
Cc: Jianfeng Liu <liujianfeng1994@...il.com>, robh@...nel.org, 
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org, heiko@...ech.de, sfr@...b.auug.org.au, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-rockchip@...ts.infradead.org, 
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] arm64: dts: rockchip: remove startup-delay-us from
 vcc3v3_pcie2x1l0 on rock-5b

Hi,

On Wed, Apr 10, 2024 at 02:30:16PM +0800, Shawn Lin wrote:
> Hi Jianfeng,
> 
> On 2024/4/1 16:13, Jianfeng Liu wrote:
> > Property startup-delay-us is copied from vendor dts and it will
> > make kernel not detect pcie wifi device. If I run command:
> > "echo 1 > /sys/bus/pci/rescan", pcie wifi device is detected, but
> > my wifi device RTL8822CE failed to load driver. Another device
> > RTL8723BE can load driver but no wifi signal is detected.
> > 
> > Removing this property will fix issues above.
> > 
> > Signed-off-by: Jianfeng Liu <liujianfeng1994@...il.com>
> 
> startup-delay-us just make sure the power rail is stable before
> any action is taken to start the link, preventing the device from
> unable to work stably. So it shouldn't be the root cause I think.
> 
> Could you help try this patch to checkout if it works for you?
> 
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index d684214..df30127 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -167,7 +167,7 @@ static int rockchip_pcie_start_link(struct dw_pcie *pci)
>         struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
> 
>         /* Reset device */
> -       gpiod_set_value_cansleep(rockchip->rst_gpio, 0);
> +       //gpiod_set_value_cansleep(rockchip->rst_gpio, 0);

Is this removal actually needed?

> 
>         rockchip_pcie_enable_ltssm(rockchip);
> 
> @@ -180,7 +180,7 @@ static int rockchip_pcie_start_link(struct dw_pcie *pci)
>          * We need more extra time as before, rather than setting just
>          * 100us as we don't know how long should the device need to reset.
>          */
> -       msleep(100);
> +       msleep(300);
>         gpiod_set_value_cansleep(rockchip->rst_gpio, 1);
> 
>         return 0;
> @@ -311,6 +311,8 @@ static int rockchip_pcie_probe(struct platform_device
> *pdev)
>         if (ret)
>                 return ret;
> 
> +       gpiod_set_value_cansleep(rockchip->rst_gpio, 0);

I suppose it makes sense to use GPIOD_OUT_LOW in
rockchip_pcie_resource_get(), so that the GPIO is requested low from
the start instead of being high for a very short amount of time.

Greetings,

-- Sebastian

> +
>         /* DON'T MOVE ME: must be enable before PHY init */
>         rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3");
> 
> 
> 
> > ---
> >   arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 1 -
> >   1 file changed, 1 deletion(-)
> > 
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > index d6bf2ee07..a9af654a0 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > @@ -76,7 +76,6 @@ vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
> >   		regulator-boot-on;
> >   		regulator-min-microvolt = <3300000>;
> >   		regulator-max-microvolt = <3300000>;
> > -		startup-delay-us = <50000>;
> >   		vin-supply = <&vcc5v0_sys>;
> >   	};
> > 
> > --
> > 2.34.1
> > 
> > 
> > _______________________________________________
> > Linux-rockchip mailing list
> > Linux-rockchip@...ts.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-rockchip
> 

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