linux-kernel - Re: [PATCH v7 00/23] Support more Amlogic SoC families in crypto driver

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Message-ID: <20240412081931.3s2fw6hds3hh5cwg@cab-wsm-0029881.sigma.sbrf.ru>
Date: Fri, 12 Apr 2024 08:19:36 +0000
From: Alexey Romanov <avromanov@...utedevices.com>
To: Herbert Xu <herbert@...dor.apana.org.au>
CC: "neil.armstrong@...aro.org" <neil.armstrong@...aro.org>,
	"clabbe@...libre.com" <clabbe@...libre.com>, "davem@...emloft.net"
	<davem@...emloft.net>, "robh+dt@...nel.org" <robh+dt@...nel.org>,
	"krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>, "khilman@...libre.com"
	<khilman@...libre.com>, "jbrunet@...libre.com" <jbrunet@...libre.com>,
	"martin.blumenstingl@...glemail.com" <martin.blumenstingl@...glemail.com>,
	"vadim.fedorenko@...ux.dev" <vadim.fedorenko@...ux.dev>,
	"linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
	"linux-amlogic@...ts.infradead.org" <linux-amlogic@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, kernel <kernel@...rdevices.ru>
Subject: Re: [PATCH v7 00/23] Support more Amlogic SoC families in crypto
 driver

Hello Herbert,

On Fri, Apr 12, 2024 at 10:53:49AM +0800, Herbert Xu wrote:
> On Thu, Apr 11, 2024 at 04:38:09PM +0300, Alexey Romanov wrote:
> >
> > Changes V6 -> V7 [9]:
> > 
> > - Fix dt-schema: power domain now required only for A1.
> > - Use crypto_skcipher_ctx_dma() helper for cipher instead of
> >   ____cacheline_aligned.
> > - Add import/export functions for hasher.
> > - Fix commit message for patch 17, acorrding to discussion [10].
> 
> Please ensure that this passes the self-tests with extra fuzzing
> enabled.

Old Amlogic Soc's for crypto HW used a BLKMV engine, which required
a clk input and a second interrupt line. New SoC's uses DMA engine
and don't need this.

I spoke with vendor, and they confirmed that AXG, G12A, G12B, SM1,
A1, S4 and GXL is using DMA engine and crypto HW is not connected
to clk / second interrupt line.

> 
> Thanks,
> -- 
> Email: Herbert Xu <herbert@...dor.apana.org.au>
> Home Page: http://gondor.apana.org.au/~herbert/
> PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

-- 
Thank you,
Alexey