lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <bd1e6507-dee4-4dcf-bbd3-50539270cd63@kernel.org>
Date: Sat, 13 Apr 2024 12:58:35 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Fabio Aiuto <fabio.aiuto@...icam.com>
Cc: Mark Brown <broonie@...nel.org>, Liam Girdwood <lgirdwood@...il.com>,
 Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
 Robin Gong <yibin.gong@....com>, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, Matteo Lisi <matteo.lisi@...icam.com>,
 Mirko Ardinghi <mirko.ardinghi@...icam.com>
Subject: Re: [PATCH v3 1/2] regulator: dt-bindings: pca9450: add PMIC_RST_B
 warm reset property

On 12/04/2024 09:21, Fabio Aiuto wrote:
> Dear Krzysztof,
> 
> Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto:
>> On 11/04/2024 18:58, Fabio Aiuto wrote:
>>> Add property to trigger warm reset on PMIC_RST_B assertion
>>>
>>
>> That's rather vague and does not tell me much why this is supposed to be
>> board level configuration. It sounds more like a debugging feature:
>> during development you want to retain memory contents for pstore etc.
>> Then I could imagine this should be turned runtime, e.g. via
>> sysfs/debugfs, because for example you want to start inspecting a
>> customer's device.
> 
> thanks, I spent too few time writing this commit log and I apologize
> for that. I was thinking about something like:
> 
>     The default configuration of the PMIC behavior makes the PMIC
>     power cycle most regulators on PMIC_RST_B assertion. This power
>     cycling causes the memory contents of OCRAM to be lost.
>     Some systems needs some memory that survives reset and
>     reboot, therefore add a property to tell PMIC_RST_B is
>     wired.
> 
> The actual configuration is made at probe time, anyway we need
> to override the default behavior of the pmic to get a warm reset
> everytime the PMIC_RST_B pin is asserted and this property tells
> us that "something is wired to that pin" and "it has to behave
> that way on pin assertion". Our use cases do not meet the need
> of further runtime configuration change.

What is the use case?

Sorry, you did not bring any further argument why this is board
specific. And please don't explain how probing works, but address the
problem here: why type of reset is specific to board design. To me it is
OS policy.

Best regards,
Krzysztof


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ