linux-kernel - Re: [PATCH] arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usage

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Message-ID: <2262532.iZASKD2KPV@diego>
Date: Sun, 14 Apr 2024 09:50:29 +0200
From: Heiko Stübner <heiko@...ech.de>
To: soc@...nel.org, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>,
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Cc: devicetree@...r.kernel.org, linux-rpi-kernel@...ts.infradead.org,
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Subject: Re: [PATCH] arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usage

Am Samstag, 13. April 2024, 00:28:51 CEST schrieb Rob Herring:
> The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
> it doesn't provide any detail on uarch specific events.
> 
> There's still remaining cases for CPUs without any corresponding PMU
> definition and for big.LITTLE systems which only have a single PMU node
> (there should be one per core type).
> 
> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
> SoC Maintainers, Can you please apply this directly.
> ---

>  arch/arm64/boot/dts/rockchip/rk3368.dtsi             | 2 +-

> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> index 62af0cb94839..734f87db4d11 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -141,7 +141,7 @@ cpu_b3: cpu@103 {
>  	};
>  
>  	arm-pmu {
> -		compatible = "arm,armv8-pmuv3";
> +		compatible = "arm,cortex-a53-pmu";
>  		interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
>  			     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
>  			     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,

For Rockchip:
Acked-by: Heiko Stuebner <heiko@...ech.de>