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Message-ID: <171309464069.10875.16937650258122631172.tip-bot2@tip-bot2>
Date: Sun, 14 Apr 2024 11:37:20 -0000
From: "tip-bot2 for Anup Patel" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Anup Patel <apatel@...tanamicro.com>, Thomas Gleixner <tglx@...utronix.de>,
 x86@...nel.org, linux-kernel@...r.kernel.org, maz@...nel.org
Subject: [tip: irq/core] irqchip/riscv-imsic: Fix boot time update effective
 affinity warning

The following commit has been merged into the irq/core branch of tip:

Commit-ID:     35d77eb7b974f62aaef5a0dc72d93ddb1ada4074
Gitweb:        https://git.kernel.org/tip/35d77eb7b974f62aaef5a0dc72d93ddb1ada4074
Author:        Anup Patel <apatel@...tanamicro.com>
AuthorDate:    Sat, 13 Apr 2024 12:22:10 +05:30
Committer:     Thomas Gleixner <tglx@...utronix.de>
CommitterDate: Sun, 14 Apr 2024 13:28:49 +02:00

irqchip/riscv-imsic: Fix boot time update effective affinity warning

Currently, the following warning is observed on the QEMU virt machine:
genirq: irq_chip APLIC-MSI-d000000.aplic did not update eff. affinity mask of irq 12

The above warning is because the IMSIC driver does not set the initial
value of effective affinity in the interrupt descriptor. To address this,
initialize the effective affinity in imsic_irq_domain_alloc().

Fixes: 027e125acdba ("irqchip/riscv-imsic: Add device MSI domain support for platform devices")
Signed-off-by: Anup Patel <apatel@...tanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Link: https://lore.kernel.org/r/20240413065210.315896-1-apatel@ventanamicro.com

---
 drivers/irqchip/irq-riscv-imsic-platform.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
index 1e6dddf..11723a7 100644
--- a/drivers/irqchip/irq-riscv-imsic-platform.c
+++ b/drivers/irqchip/irq-riscv-imsic-platform.c
@@ -157,6 +157,7 @@ static int imsic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
 			    handle_simple_irq, NULL, NULL);
 	irq_set_noprobe(virq);
 	irq_set_affinity(virq, cpu_online_mask);
+	irq_data_update_effective_affinity(irq_get_irq_data(virq), cpumask_of(vec->cpu));
 
 	return 0;
 }

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