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Message-ID: <c21f6d49-bd70-465e-a446-fb70838bab48@linaro.org>
Date: Sun, 14 Apr 2024 21:22:50 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: matthew.gerlach@...ux.intel.com, bhelgaas@...gle.com,
lpieralisi@...nel.org, kw@...ux.com, robh@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] dt-bindings: PCI: altera: Convert to YAML
On 13/04/2024 19:26, matthew.gerlach@...ux.intel.com wrote:
> From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
>
> Convert the device tree bindings for the Altera Root Port PCIe controller
> from text to YAML.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
..
> +allOf:
> + - $ref: /schemas/pci/pci-host-bridge.yaml#
> + - if:
> + properties:
> + compatible:
> + enum:
> + - altr,pcie-root-port-1.0
> + then:
> + properties:
> + reg:
> + items:
> + - description: TX slave port region
> + - description: Control register access region
> +
> + reg-names:
> + items:
> + - const: Txs
> + - const: Cra
> +
> + else:
> + properties:
> + reg:
> + items:
> + - description: Hard IP region
Why Hip is the first? Old binding suggested it to be the last entry. It
would also make binding easier, as you describe reg and reg-names in
top-level and just limit them with min/maxItems.
Does anything depend on different order (Hip as first)?
> + - description: TX slave port region
> + - description: Control register access region
> +
> + reg-names:
> + items:
> + - const: Hip
> + - const: Txs
> + - const: Cra
> +
Best regards,
Krzysztof
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