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Message-ID: <2929835.e9J7NaK4W3@jernej-laptop>
Date: Mon, 15 Apr 2024 23:04:43 +0200
From: Jernej Škrabec <jernej.skrabec@...il.com>
To: wens@...e.org
Cc: samuel@...lland.org, sboyd@...nel.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org, Chad Wagner <wagnerch42@...il.com>
Subject:
Re: [PATCH] clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate change
Dne sobota, 2. marec 2024 ob 12:42:11 GMT +2 je Chen-Yu Tsai napisal(a):
> On Sat, Oct 14, 2023 at 2:17 AM Jernej Skrabec <jernej.skrabec@...il.com> wrote:
> >
> > While PLL CPUX clock rate change when CPU is running from it works in
> > vast majority of cases, now and then it causes instability. This leads
> > to system crashes and other undefined behaviour. After a lot of testing
> > (30+ hours) while also doing a lot of frequency switches, we can't
> > observe any instability issues anymore when doing reparenting to stable
> > clock like 24 MHz oscillator.
> >
> > Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> > Reported-by: Chad Wagner <wagnerch42@...il.com>
> > Link: https://forum.libreelec.tv/thread/27295-orange-pi-3-lts-freezes/
> > Tested-by: Chad Wagner <wagnerch42@...il.com>
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@...il.com>
>
> Reviewed-by: Chen-Yu Tsai <wens@...e.org>
>
Applied.
Best regards,
Jernej
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