linux-kernel - [PATCH 0/4] dmaengine: dw: Fix src/dst addr width misconfig

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Date: Tue, 16 Apr 2024 19:28:54 +0300
From: Serge Semin <fancer.lancer@...il.com>
To: Viresh Kumar <vireshk@...nel.org>,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	Vinod Koul <vkoul@...nel.org>
Cc: Serge Semin <fancer.lancer@...il.com>,
	Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jirislaby@...nel.org>,
	dmaengine@...r.kernel.org,
	linux-serial@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH 0/4] dmaengine: dw: Fix src/dst addr width misconfig

The main goal of this series is to fix the data disappearance in case of
the DW UART handled by the DW AHB DMA engine. The problem happens on a
portion of the data received when the pre-initialized DEV_TO_MEM
DMA-transfer is paused and then disabled. The data just hangs up in the
DMA-engine FIFO and isn't flushed out to the memory on the DMA-channel
suspension (see the second commit log for details). On a way to find the
denoted problem fix it was discovered that the driver doesn't verify the
peripheral device address width specified by a client driver, which in its
turn if unsupported or undefined value passed may cause DMA-transfer being
misconfigured. It's fixed in the first patch of the series.

In addition to that two cleanup patch follow the fixes described above in
order to make the DWC-engine configuration procedure more coherent. First
one simplifies the CTL_LO register setup methods. Second one simplifies
the max-burst calculation procedure and unifies it with the rest of the
verification methods. Please see the patches log for more details.

Signed-off-by: Serge Semin <fancer.lancer@...il.com>
Cc: "Ilpo Järvinen" <ilpo.jarvinen@...ux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Jiri Slaby <jirislaby@...nel.org>
Cc: dmaengine@...r.kernel.org
Cc: linux-serial@...r.kernel.org
Cc: linux-kernel@...r.kernel.org

Serge Semin (4):
  dmaengine: dw: Add peripheral bus width verification
  dmaengine: dw: Add memory bus width verification
  dmaengine: dw: Simplify prepare CTL_LO methods
  dmaengine: dw: Simplify max-burst calculation procedure

 drivers/dma/dw/core.c   | 97 ++++++++++++++++++++++++++++++++++++-----
 drivers/dma/dw/dw.c     | 43 +++++++++++-------
 drivers/dma/dw/idma32.c | 25 +++++++----
 drivers/dma/dw/regs.h   |  1 -
 4 files changed, 129 insertions(+), 37 deletions(-)

-- 
2.43.0