linux-kernel - Re: [PATCH 05/17] arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller

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Message-ID: <CADrjBPqwLt6gzwMpkZvxp5sC-owdDYUN91F0-nV2NvEzek_v9g@mail.gmail.com>
Date: Tue, 16 Apr 2024 12:56:50 +0100
From: Peter Griffin <peter.griffin@...aro.org>
To: André Draszik <andre.draszik@...aro.org>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, vkoul@...nel.org, kishon@...nel.org, 
	alim.akhtar@...sung.com, avri.altman@....com, bvanassche@....org, 
	s.nawrocki@...sung.com, cw00.choi@...sung.com, jejb@...ux.ibm.com, 
	martin.petersen@...cle.com, chanho61.park@...sung.com, ebiggers@...nel.org, 
	linux-scsi@...r.kernel.org, linux-phy@...ts.infradead.org, 
	devicetree@...r.kernel.org, linux-clk@...r.kernel.org, 
	linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, tudor.ambarus@...aro.org, 
	saravanak@...gle.com, willmcvicker@...gle.com
Subject: Re: [PATCH 05/17] arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller

Hi André,

Thanks for the review.

On Fri, 5 Apr 2024 at 08:38, André Draszik <andre.draszik@...aro.org> wrote:
>
> On Thu, 2024-04-04 at 13:25 +0100, Peter Griffin wrote:
> > Enable the cmu_hsi2 clock management unit. It feeds some of
> > the high speed interfaces such as PCIe and UFS.
> >
> > Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
> > ---
> >  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> > index eddb6b326fde..38ac4fb1397e 100644
> > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> > @@ -1253,6 +1253,18 @@ pinctrl_hsi1: pinctrl@...40000 {
> >                       interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>;
> >               };
> >
> > +             cmu_hsi2: clock-controller@...00000 {
> > +                     compatible = "google,gs101-cmu-hsi2";
> > +                     reg = <0x14400000 0x4000>;
> > +                     #clock-cells = <1>;
> > +                     clocks = <&ext_24_5m>,
> > +                              <&cmu_top CLK_DOUT_CMU_HSI2_BUS>,
> > +                              <&cmu_top CLK_DOUT_CMU_HSI2_PCIE>,
> > +                              <&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
> > +                              <&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
> > +                     clock-names = "oscclk", "bus", "pcie", "ufs_embd", "mmc_card";
> > +             };
>
> This doesn't build because you didn't add the clock ids in the binding patch.

These clock IDs are for cmu_top, not cmu_hsi2. They were added as part
of the initial gs101/Oriole upstream support series in the following
commit

commit 0a910f1606384a5886a045e36b1fc80a7fa6706b
Author: Peter Griffin <peter.griffin@...aro.org>
Date:   Sat Dec 9 23:30:48 2023 +0000

    dt-bindings: clock: Add Google gs101 clock management unit bindings

    Provide dt-schema documentation for Google gs101 SoC clock controller.
    Currently this adds support for cmu_top, cmu_misc and cmu_apm.

    Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
    Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
    Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
    Link: https://lore.kernel.org/r/20231209233106.147416-3-peter.griffin@linaro.org
    Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

regards,

Peter