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Message-ID: <207eb8d7-1a40-4114-a84b-26616dc39fcc@collabora.com>
Date: Wed, 17 Apr 2024 17:32:54 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Rob Herring <robh@...nel.org>
Cc: djakov@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, matthias.bgg@...il.com, lgirdwood@...il.com,
broonie@...nel.org, keescook@...omium.org, gustavoars@...nel.org,
henryc.chen@...iatek.com, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
kernel@...labora.com, wenst@...omium.org, amergnat@...libre.com
Subject: Re: [PATCH v2 2/7] dt-bindings: interconnect: Add MediaTek EMI
Interconnect bindings
Il 17/04/24 16:54, Rob Herring ha scritto:
> On Wed, Apr 17, 2024 at 11:14:37AM +0200, AngeloGioacchino Del Regno wrote:
>> Add bindings for the MediaTek External Memory Interface Interconnect,
>> which providers support system bandwidth requirements through Dynamic
>> Voltage Frequency Scaling Resource Collector (DVFSRC) hardware.
>>
>> This adds bindings for MediaTek MT8183 and MT8195 SoCs.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> ---
>> .../interconnect/mediatek,mt8183-emi.yaml | 76 +++++++++++++++++++
>> .../interconnect/mediatek,mt8183.h | 23 ++++++
>> .../interconnect/mediatek,mt8195.h | 44 +++++++++++
>> 3 files changed, 143 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml
>> create mode 100644 include/dt-bindings/interconnect/mediatek,mt8183.h
>> create mode 100644 include/dt-bindings/interconnect/mediatek,mt8195.h
>>
>> diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml
>> new file mode 100644
>> index 000000000000..3ad60fd21f83
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml
>> @@ -0,0 +1,76 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: MediaTek External Memory Interface (EMI) Interconnect
>> +
>> +maintainers:
>> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> +
>> +description: |
>> + EMI interconnect providers support system bandwidth requirements through
>> + Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware.
>> + The provider is able to communicate with the DVFSRC through Secure Monitor
>> + Call (SMC).
>> +
>> + ICC provider ICC Nodes
>> + ---- ----
>> + _________ |CPU | |--- |VPU |
>> + _____ | |----- ---- | ----
>> + | |->| DRAM | ---- | ----
>> + |DRAM |->|scheduler|----- |GPU | |--- |DISP|
>> + | |->| (EMI) | ---- | ----
>> + |_____|->|_________|---. ----- | ----
>> + /|\ `-|MMSYS|--|--- |VDEC|
>> + | ----- | ----
>> + | | ----
>> + | change DRAM freq |--- |VENC|
>> + -------- | ----
>> + SMC --> | DVFSRC | | ----
>> + -------- |--- |IMG |
>> + | ----
>> + | ----
>> + |--- |CAM |
>> + ----
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - mediatek,mt8183-emi
>> + - mediatek,mt8195-emi
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + '#interconnect-cells':
>> + const: 1
>> +
>> +required:
>> + - compatible
>> + - '#interconnect-cells'
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/interconnect/mediatek,mt8195.h>
>> +
>> + soc {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + system-controller@...12000 {
>> + compatible = "mediatek,mt8195-dvfsrc";
>> + reg = <0 0x10012000 0 0x1000>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + emi_icc: interconnect@1 {
>> + compatible = "mediatek,mt8195-emi";
>> + reg = <1>;
>> + #interconnect-cells = <1>;
>
>
> There's not really any need for this node. Just put #interconnect-cells
> in the parent.
>
Actually, I modeled it to be a subnode of the DVFSRC for multiple reasons:
1. Some SoCs have more than one interconnect on the DVFSRC (two different kinds
of EMI interconnect, and then also a SMI interconnect); and
2. Some boards will want to not enable the interconnect driver because some of
those are not battery powered (so they just keep the knobs at full thrust
from the bootloader and never care scaling busses); and
3. Some DVFSRC interconnect features may depend on firmware (but I'm not
sure which ones and which SoCs, as there are lots of SMI/EMI ICC things that
are not implemented yet with this series).
The alternative would've been to add a property to enable, or disable, the SMI ICC
(not present in this series), and/or one, or the other kind of EMI ICC (this series
implements only the simpler EMI ICC, and I keep saying "the other" because I
currently don't remember the name).... which is really ugly.
Ideas? :-)
Cheers,
Angelo
> Rob
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