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Date: Thu, 18 Apr 2024 02:26:38 +0800
From: Xi Ruoyao <xry111@...111.site>
To: Sean Christopherson <seanjc@...gle.com>, Dave Hansen
 <dave.hansen@...el.com>
Cc: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>, Dave Hansen
 <dave.hansen@...ux.intel.com>, Michael Kelley <mhklinux@...look.com>, Andy
 Lutomirski <luto@...nel.org>, Peter Zijlstra <peterz@...radead.org>, Thomas
 Gleixner <tglx@...utronix.de>,  Ingo Molnar <mingo@...hat.com>, Borislav
 Petkov <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>,  x86@...nel.org,
 linux-kernel@...r.kernel.org, Andrew Cooper <andrew.cooper3@...rix.com>
Subject: Re: [PATCH v8 2/2] x86/mm: Don't disable PCID if the kernel is
 running on a hypervisor

On Wed, 2024-04-17 at 11:23 -0700, Sean Christopherson wrote:
> On Wed, Apr 17, 2024, Dave Hansen wrote:
> > On 4/17/24 10:22, Pawan Gupta wrote:
> > > > >  static const struct x86_cpu_id invlpg_miss_ids[] = {
> > > > > +	/* Only bare-metal is affected.  PCIDs in guests are OK.  */
> > > > > +	{
> > > > > +	  .vendor	= X86_VENDOR_INTEL,
> > > > > +	  .family	= 6,
> > > > > +	  .model	= INTEL_FAM6_ANY,
> 
> Just in case we go this route (I hope we don't), this should probably be:
> 
>         /* Only bare-metal is affected  PCIDs in guests are OK.  */
>         {
>           .vendor       = X86_VENDOR_ANY,
>           .feature      = X86_FEATURE_HYPERVISOR,
>           .driver_data  = 0,
>         },
> 
> to make it clear that the goal is to match only the feature.  Matching Intel P6
> suffices because that's what the other entries in the array all check, but it
> makes subtle, confusing code even more subtle and confusing.

Agreed.

/* snip */

> > > > 
> > Let's just do the X86_FEATURE_HYPERVISOR explicitly in the code instead
> > of trying to cram it into the invlpg_miss_ids[] check.  It's way easier
> > to understand with an explicit code check.
> 
> +1.  And it doesn't rely on the HYPERVISOR entry being the first entry, which
> is doubly evil.

So I'll go with the explicit checking in v9.  I'll send it tomorrow.

-- 
Xi Ruoyao <xry111@...111.site>
School of Aerospace Science and Technology, Xidian University

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