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Message-Id: <20240404-topic-smem_speedbin-v2-0-c84f820b7e5b@linaro.org>
Date: Wed, 17 Apr 2024 22:02:52 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>, Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
devicetree@...r.kernel.org, Neil Armstrong <neil.armstrong@...aro.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH v2 0/7] Add SMEM-based speedbin matching
Newer (SM8550+) SoCs don't seem to have a nice speedbin fuse anymore,
but instead rely on a set of combinations of "feature code" (FC) and
"product code" (PC) identifiers to match the bins. This series adds
support for that.
I suppose a qcom/for-soc immutable branch would be in order if we want
to land this in the upcoming cycle.
FWIW I preferred the fuses myself..
Patches 5 and 6 coooould be omitted, but I'd reaaally like them to land
and soon at that. This would enable even more overdue and necessary
cleanups/feature prepwork sooner than later.
The dt patch can only be picked if the drm patches are there.
Depends on:
https://lore.kernel.org/linux-arm-msm/20240412-topic-adreno_nullptr_supphw-v1-1-eb30a1c1292f@linaro.org/
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
Changes in v2:
- Separate moving existing and adding new defines
- Fix kerneldoc copypasta
- Remove some wrong comments and defines
- Remove assumed "max" values for PCs and external FCs
- Improve some commit messages
- Return -EOPNOTSUPP instead of -EINVAL when calling p/fcode getters
on socinfo older than v16
- Drop pcode getters and evaluation (doesn't matter for Adreno on
non-proto SoCs, might matter in the future or w/ other peripherals)
- Rework the speedbin logic to be hopefully saner (accidental support
for A2xx-A4xx, I guess!)
- Reorder some existing function calls to avoid crazy nullptrs
- ""fix"" the smem dependency inconvenience
- Link to v1: https://lore.kernel.org/r/20240405-topic-smem_speedbin-v1-0-ce2b864251b1@linaro.org
---
Konrad Dybcio (7):
soc: qcom: Move some socinfo defines to the header
soc: qcom: smem: Add a feature code getter
drm/msm/adreno: Implement SMEM-based speed bin
drm/msm/adreno: Add speedbin data for SM8550 / A740
drm/msm/adreno: Define A530 speed bins explicitly
drm/msm/adreno: Redo the speedbin assignment
arm64: dts: qcom: sm8550: Wire up GPU speed bin & more OPPs
arch/arm64/boot/dts/qcom/sm8550.dtsi | 21 +++++-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 34 ----------
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 54 ---------------
drivers/gpu/drm/msm/adreno/adreno_device.c | 13 ++++
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 103 +++++++++++++++++++++++++----
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 11 +--
drivers/gpu/drm/msm/msm_gpu.c | 3 -
drivers/soc/qcom/smem.c | 33 +++++++++
drivers/soc/qcom/socinfo.c | 8 ---
include/linux/soc/qcom/smem.h | 1 +
include/linux/soc/qcom/socinfo.h | 34 ++++++++++
11 files changed, 198 insertions(+), 117 deletions(-)
---
base-commit: b13768266bf3a129adf5bbd0bad28e23a74329a2
change-id: 20240404-topic-smem_speedbin-8deecd0bef0e
Best regards,
--
Konrad Dybcio <konrad.dybcio@...aro.org>
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