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Message-ID: <20240418071610.358944-4-u-kumar1@ti.com>
Date: Thu, 18 Apr 2024 12:46:10 +0530
From: Udit Kumar <u-kumar1@...com>
To: <nm@...com>, <vigneshr@...com>, <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <francesco@...cini.it>
CC: <kristo@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
Udit Kumar
<u-kumar1@...com>
Subject: [PATCH v2 3/3] arm64: dts: ti: k3-j7200: Arranging pin mux in alphabetical order
Arranging pin mux in order of main_pmx0/1, wkup_pmx0/1/2/3.
Signed-off-by: Udit Kumar <u-kumar1@...com>
---
.../dts/ti/k3-j7200-common-proc-board.dts | 131 +++++++++---------
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 31 +++--
2 files changed, 80 insertions(+), 82 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 6593c5da82c0..e910ac9093e5 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -118,7 +118,70 @@ transceiver3: can-phy3 {
};
};
-&wkup_pmx0 {
+&main_pmx0 {
+ main_uart0_pins_default: main-uart0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
+ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
+ J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
+ J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
+ >;
+ };
+
+ main_uart1_pins_default: main-uart1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
+ J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */
+ >;
+ };
+
+ main_uart3_pins_default: main-uart3-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
+ J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
+ >;
+ };
+
+ main_i2c1_pins_default: main-i2c1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
+ J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
+ >;
+ };
+
+ main_mmc1_pins_default: main-mmc1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
+ J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
+ J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
+ J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
+ J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
+ J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
+ J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
+ J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
+ >;
+ };
+
+ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
+ >;
+ };
+
+ main_mcan3_pins_default: main-mcan3-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x3c, PIN_INPUT, 0) /* (W16) MCAN3_RX */
+ J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */
+ >;
+ };
+};
+
+&main_pmx1 {
+ main_usbss0_pins_default: main-usbss0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
+ >;
+ };
};
&wkup_pmx2 {
@@ -196,72 +259,6 @@ J721E_WKUP_IOPAD(0x60, PIN_INPUT, 7) /* (D14) WKUP_GPIO0_2 */
};
};
-&main_pmx0 {
- main_uart0_pins_default: main-uart0-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
- J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
- J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
- J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
- >;
- };
-
- main_uart1_pins_default: main-uart1-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
- J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */
- >;
- };
-
- main_uart3_pins_default: main-uart3-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
- J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
- >;
- };
-
- main_i2c1_pins_default: main-i2c1-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
- J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
- >;
- };
-
- main_mmc1_pins_default: main-mmc1-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
- J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
- J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
- J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
- J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
- J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
- J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
- J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
- >;
- };
-
- vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
- >;
- };
-
- main_mcan3_pins_default: main-mcan3-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x3c, PIN_INPUT, 0) /* (W16) MCAN3_RX */
- J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */
- >;
- };
-};
-
-&main_pmx1 {
- main_usbss0_pins_default: main-usbss0-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
- >;
- };
-};
-
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
status = "reserved";
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index 7e6a584ac6f0..d9eddc5191b1 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -103,6 +103,22 @@ transceiver0: can-phy0 {
};
};
+&main_pmx0 {
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
+ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
+ >;
+ };
+
+ main_mcan0_pins_default: main-mcan0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x24, PIN_INPUT, 0) /* (V20) MCAN0_RX */
+ J721E_IOPAD(0x20, PIN_OUTPUT, 0) /* (V18) MCAN0_TX */
+ >;
+ };
+};
+
&wkup_pmx0 {
mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
pinctrl-single,pins = <
@@ -156,21 +172,6 @@ J721E_WKUP_IOPAD(0x01c, PIN_INPUT, 7) /* (E18) WKUP_GPIO0_84 */
};
};
-&main_pmx0 {
- main_i2c0_pins_default: main-i2c0-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
- J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
- >;
- };
-
- main_mcan0_pins_default: main-mcan0-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x24, PIN_INPUT, 0) /* (V20) MCAN0_RX */
- J721E_IOPAD(0x20, PIN_OUTPUT, 0) /* (V18) MCAN0_TX */
- >;
- };
-};
&hbmc {
/* OSPI and HBMC are muxed inside FSS, Bootloader will enable
--
2.34.1
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