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Message-ID: <84b162f6-fc34-4008-83f6-2ee9e42c5a59@gmail.com>
Date: Fri, 19 Apr 2024 11:55:14 +0800
From: Eric Cheng <eric.cheng.linux@...il.com>
To: Anup Patel <apatel@...tanamicro.com>
Cc: Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Frank Rowand <frowand.list@...il.com>, Conor Dooley <conor+dt@...nel.org>,
Marc Zyngier <maz@...nel.org>, Björn Töpel
<bjorn@...nel.org>, Atish Patra <atishp@...shpatra.org>,
Andrew Jones <ajones@...tanamicro.com>, Sunil V L
<sunilvl@...tanamicro.com>, Saravana Kannan <saravanak@...gle.com>,
Anup Patel <anup@...infault.org>, linux-riscv@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v16 2/9] irqchip: Add RISC-V incoming MSI controller early
driver
On 4/19/2024 11:44 AM, Anup Patel wrote:
> On Fri, Apr 19, 2024 at 8:53 AM Eric Cheng <eric.cheng.linux@...il.com> wrote:
>>
>> On 3/7/2024 10:03 PM, Anup Patel wrote:
>>
>>> +static int __init imsic_parse_fwnode(struct fwnode_handle *fwnode,
>>> + struct imsic_global_config *global,
>>> + u32 *nr_parent_irqs,
>>> + u32 *nr_mmios)
>>> +{
>>
>> ...
>>
>>> + /*
>>> + * Find first bit position of group index.
>>> + * If not specified assumed the default APLIC-IMSIC configuration.
>>> + */
>>> + rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-shift",
>>> + &global->group_index_shift);
>>> + if (rc)
>>> + global->group_index_shift = IMSIC_MMIO_PAGE_SHIFT * 2;
>>> +
>>> + /* Find number of interrupt identities */
>>> + rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-ids",
>>> + &global->nr_ids);
>>
>> Will here check if the pass-in interrupt identity number is (multi-64 -1) &&
>> between [63, 2047]?
>> Per spec AIA v1.0, Sec. 3.1 Interrupt files and interrupt identities:
>> "The number of interrupt identities supported by an interrupt file (and hence
>> the number of active
>> bits in each array) is one less than a multiple of 64, and may be a minimum of
>> 63 and a maximum
>> of 2047."
>
> There is already a check on global->nr_ids to ensure the above is satisfied.
> Please see further below in imsic_parse_fwnode() function.
>
Right, thanks.
>>
>>> + if (rc) {
>>> + pr_err("%pfwP: number of interrupt identities not found\n", fwnode);
>>> + return rc;
>>> + }
>>> +
>> ...
>>
>>
>
> Regards,
> Anup
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