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Message-ID: <7b23e6f6-23cc-4dff-aea1-cb30e91d046d@intel.com>
Date: Fri, 19 Apr 2024 14:47:16 +0800
From: Xiaoyao Li <xiaoyao.li@...el.com>
To: Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <seanjc@...gle.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
Yan Zhao <yan.y.zhao@...el.com>, Isaku Yamahata <isaku.yamahata@...el.com>,
Michael Roth <michael.roth@....com>, Yu Zhang <yu.c.zhang@...ux.intel.com>,
Chao Peng <chao.p.peng@...ux.intel.com>, Fuad Tabba <tabba@...gle.com>,
David Matlack <dmatlack@...gle.com>
Subject: Re: [PATCH 00/16] KVM: x86/mmu: Page fault and MMIO cleanups
On 4/17/2024 8:48 PM, Paolo Bonzini wrote:
> On Wed, Feb 28, 2024 at 3:41 AM Sean Christopherson <seanjc@...gle.com> wrote:
>>
>> This is a combination of prep work for TDX and SNP, and a clean up of the
>> page fault path to (hopefully) make it easier to follow the rules for
>> private memory, noslot faults, writes to read-only slots, etc.
>>
>> Paolo, this is the series I mentioned in your TDX/SNP prep work series.
>> Stating the obvious, these
>>
>> KVM: x86/mmu: Pass full 64-bit error code when handling page faults
>> KVM: x86: Move synthetic PFERR_* sanity checks to SVM's #NPF handler
>>
>> are the drop-in replacements.
>
> Applied to kvm-coco-queue, thanks, and these to kvm/queue as well:
>
> KVM: x86/mmu: Exit to userspace with -EFAULT if private fault hits emulation
> KVM: x86: Remove separate "bit" defines for page fault error code masks
> KVM: x86: Define more SEV+ page fault error bits/flags for #NPF
> KVM: x86: Move synthetic PFERR_* sanity checks to SVM's #NPF handler
> KVM: x86/mmu: Pass full 64-bit error code when handling page faults
> KVM: x86/mmu: WARN if upper 32 bits of legacy #PF error code are non-zero
Paolo,
It seems you forgot to incorporate the review comment into the patch
before you queued them to kvm/queue.
e.g., the comment from Dongli to
KVM: x86: Define more SEV+ page fault error bits/flags for #NPF
https://lore.kernel.org/all/12f0b643-e2e8-8a9a-b264-5c7c460f1a24@oracle.com/
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