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Message-ID: <20240419011445.2ryomgruj2ein6wh@desk>
Date: Thu, 18 Apr 2024 18:14:45 -0700
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: Josh Poimboeuf <jpoimboe@...nel.org>
Cc: Andrew Cooper <andrew.cooper3@...rix.com>, x86@...nel.org,
	linux-kernel@...r.kernel.org,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Daniel Sneddon <daniel.sneddon@...ux.intel.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Alexandre Chartre <alexandre.chartre@...cle.com>,
	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Sean Christopherson <seanjc@...gle.com>,
	Dave Hansen <dave.hansen@...ux.intel.com>,
	Nikolay Borisov <nik.borisov@...e.com>,
	KP Singh <kpsingh@...nel.org>, Waiman Long <longman@...hat.com>,
	Borislav Petkov <bp@...en8.de>, Ingo Molnar <mingo@...nel.org>
Subject: Re: [PATCH v3] x86/bugs: Only harden syscalls when needed

On Thu, Apr 18, 2024 at 05:48:45PM -0700, Josh Poimboeuf wrote:
> On Wed, Apr 17, 2024 at 07:01:54PM +0100, Andrew Cooper wrote:
> > On 17/04/2024 6:57 pm, Josh Poimboeuf wrote:
> > > On Wed, Apr 17, 2024 at 09:45:14AM -0700, Pawan Gupta wrote:
> > >> On Wed, Apr 17, 2024 at 04:14:26PM +0100, Andrew Cooper wrote:
> > >>> On 17/04/2024 12:02 am, Josh Poimboeuf wrote:
> > >>>> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
> > >>>> index ca295b0c1eee..dcb97cc2758f 100644
> > >>>> --- a/arch/x86/kernel/cpu/bugs.c
> > >>>> +++ b/arch/x86/kernel/cpu/bugs.c
> > >>>> @@ -1678,6 +1687,21 @@ static void __init spectre_v2_select_mitigation(void)
> > >>>>  	enum spectre_v2_mitigation_cmd cmd = spectre_v2_parse_cmdline();
> > >>>>  	enum spectre_v2_mitigation mode = SPECTRE_V2_NONE;
> > >>>>  
> > >>>> +	/*
> > >>>> +	 * X86_FEATURE_INDIRECT_SAFE indicates whether indirect calls can be
> > >>>> +	 * considered safe.  That means either:
> > >>>> +	 *
> > >>>> +	 *   - the CPU isn't vulnerable to Spectre v2 or its variants;
> > >>>> +	 *
> > >>>> +	 *   - a hardware mitigation is in place (e.g., IBRS, BHI_DIS_S); or
> > >>>> +	 *
> > >>>> +	 *   - the user turned off mitigations altogether.
> > >>>> +	 *
> > >>>> +	 * Assume innocence until proven guilty: set the cap bit now, then
> > >>>> +	 * clear it later if/when needed.
> > >>>> +	 */
> > >>>> +	setup_force_cpu_cap(X86_FEATURE_INDIRECT_SAFE);
> > >>> Following on from the (re)discovery that X86_FEATURE_RETPOLINE is a poor
> > >>> name given what it *actually* does, can I recommend s/SAFE/OK/ here?
> > >> Or simply X86_FEATURE_USE_INDIRECT_BRANCH.
> > >>
> > >>> This flag really is "do I want indirect branches or not", which - as
> > >>> noted here - is more than just a judgement of whether indirect branches
> > >>> are "safe".
> > > X86_FEATURE_USE_INDIRECT_BRANCH sounds good.  It's a bit long but does
> > > describe it better.
> > 
> > Works for me.  Definitely an improvement over SAFE.
> 
> USE_INDIRECT_BRANCH is now irking me: "use indirect branch for what?
> when? why?"

I don't think feature bits in general tries to answer when & why. And it
shouldn't be the case, otherwise we will need multi-line names. IMO, it
should just tell what the feature means. But, I am not too hung up on
name, I am fine with X86_FEATURE_INDIRECT_OK or anything similar.

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