linux-kernel - Re: [PATCH v4 1/3] serial: sc16is7xx: announce support of SER_RS485_RTS_ON

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Message-ID: <CAF1WSuxGr7W7XRRswPxXyS+L3KBc-Y3Dg8o8EeeL3u-TioU-Hg@mail.gmail.com>
Date: Fri, 19 Apr 2024 16:46:41 +0300
From: "Konstantin P." <ria.freelander@...il.com>
To: Hugo Villeneuve <hugo@...ovil.com>
Cc: Konstantin Pugin <rilian.la.te@...ru>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, 
	Jiri Slaby <jirislaby@...nel.org>, Hugo Villeneuve <hvilleneuve@...onoff.com>, 
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, 
	Lech Perczak <lech.perczak@...lingroup.com>, 
	Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>, 
	Thomas Gleixner <tglx@...utronix.de>, linux-kernel@...r.kernel.org, 
	linux-serial@...r.kernel.org
Subject: Re: [PATCH v4 1/3] serial: sc16is7xx: announce support of SER_RS485_RTS_ON_SEND

On Fri, Apr 19, 2024 at 4:29 PM Hugo Villeneuve <hugo@...ovil.com> wrote:
>
> On Fri, 19 Apr 2024 15:45:01 +0300
> Konstantin Pugin <rilian.la.te@...ru> wrote:
>
> > From: Konstantin Pugin <ria.freelander@...il.com>
> >
> > The hardware supports both RTS_ON_SEND and RTS_AFTER_SEND modes, but
> > after the commit 4afeced55baa ("serial: core: fix sanitizing check for
> > RTS settings") we always end up with SER_RS485_RTS_AFTER_SEND set and
> > always write to the register field SC16IS7XX_EFCR_RTS_INVERT_BIT, which
> > breaks some hardware using these chips.
>
> Hi Konstantin,
> I am using RS-485 mode, and currently I may need SC16IS7XX_EFCR_RTS_INVERT_BIT to be set for my setup to work (not sure, must check this). Does it mean that with this patch it will be cleared? I am not sure by reading your commit message...
>
> I need to look at this in more details, and test it on my hardware, which I will be able to do only next week. I will keep you posted.
>
> Hugo.

Hello, Hugo. My patch's changes change behaviour in one place. Now you
can select SC16IS7XX_EFCR_RTS_INVERT_BIT setting by passing
SER_RS485_RTS_AFTER_SEND (in this case this bit will be set) or
SER_RS485_RTS_ON_SEND (in this case this bit will be clear). Previous
behaviour was always setting the bit, even if SER_RS485_RTS_ON_SEND is
passed, so there was no way to run hardware with bit cleared, and for
my hardware it is a requirement.

>
> >
> > Fixes: 267913ecf737 ("serial: sc16is7xx: Fill in rs485_supported")
> > Signed-off-by: Konstantin Pugin <ria.freelander@...il.com>
> > ---
> >  drivers/tty/serial/sc16is7xx.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
> > index 03cf30e20b75..dfcc804f558f 100644
> > --- a/drivers/tty/serial/sc16is7xx.c
> > +++ b/drivers/tty/serial/sc16is7xx.c
> > @@ -1449,7 +1449,7 @@ static int sc16is7xx_setup_mctrl_ports(struct sc16is7xx_port *s,
> >  }
> >
> >  static const struct serial_rs485 sc16is7xx_rs485_supported = {
> > -     .flags = SER_RS485_ENABLED | SER_RS485_RTS_AFTER_SEND,
> > +     .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
> >       .delay_rts_before_send = 1,
> >       .delay_rts_after_send = 1,      /* Not supported but keep returning -EINVAL */
> >  };
> > --
> > 2.34.1
> >
> >
> >
>
>
> --
> Hugo Villeneuve <hugo@...ovil.com>