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Date: Fri, 19 Apr 2024 18:53:52 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Alexandre Mergnat <amergnat@...libre.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, CK Hu <ck.hu@...iatek.com>, Catalin Marinas <catalin.marinas@....com>, Chun-Kuang Hu <chunkuang.hu@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Daniel Vetter <daniel@...ll.ch>, David Airlie <airlied@...il.com>, Fabien Parent <fparent@...libre.com>, Jitao Shi <jitao.shi@...iatek.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Markus Schneider-Pargmann <msp@...libre.com>, Matthias Brugger <matthias.bgg@...il.com>, Maxime Ripard <mripard@...nel.org>, Michael Turquette <mturquette@...libre.com>, Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, Uwe Kleine-König <u.kleine-koenig@...gutronix.de>, Will Deacon <will@...nel.org>
Cc: dri-devel@...ts.freedesktop.org, linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-pwm@...r.kernel.org, linux-clk@...r.kernel.org, Alexandre Mergnat <amergnat@...libre.com>
Subject: Re: [PATCH v3 12/17] clk: mediatek: mt8365-mm: fix DPI0 parent

Quoting Alexandre Mergnat (2024-04-18 07:17:00)
> To have a working display through DPI, a workaround has been
> implemented downstream to add "mm_dpi0_dpi0" and "dpi0_sel" to
> the DPI node. Shortly, that add an extra clock.
> 
> It seems consistent to have the "dpi0_sel" as parent.
> Additionnaly, "vpll_dpix" isn't used/managed.
> 
> Then, set the "mm_dpi0_dpi0" parent clock to "dpi0_sel".
> 
> The new clock tree is:
> 
> clk26m
>   lvdspll
>     lvdspll_X (2, 4, 8, 16)
>       dpi0_sel
>         mm_dpi0_dpi0
> 
> Fixes: d46adccb7966 ("clk: mediatek: add driver for MT8365 SoC")
> Signed-off-by: Alexandre Mergnat <amergnat@...libre.com>
> ---

Applied to clk-next

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