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Message-Id: <20240420-dpu-format-v2-3-9e93226cbffd@linaro.org>
Date: Sat, 20 Apr 2024 07:01:00 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 3/9] drm/msm/dpu: in dpu_format replace bitmap with
unsigned long field
Using bitmap for the flags results in a clumsy syntax on test_bit,
replace it with unsigned long type and simple binary ops.
Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 18 +++++++++---------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 16 +++++++---------
2 files changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
index 87fa14fc5dd0..caf536788ece 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
@@ -45,7 +45,7 @@ bp, flg, fm, np) \
.unpack_count = uc, \
.bpp = bp, \
.fetch_mode = fm, \
- .flag = {(flg)}, \
+ .flags = flg, \
.num_planes = np, \
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
}
@@ -64,7 +64,7 @@ alpha, bp, flg, fm, np, th) \
.unpack_count = uc, \
.bpp = bp, \
.fetch_mode = fm, \
- .flag = {(flg)}, \
+ .flags = flg, \
.num_planes = np, \
.tile_height = th \
}
@@ -84,7 +84,7 @@ alpha, chroma, count, bp, flg, fm, np) \
.unpack_count = count, \
.bpp = bp, \
.fetch_mode = fm, \
- .flag = {(flg)}, \
+ .flags = flg, \
.num_planes = np, \
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
}
@@ -102,7 +102,7 @@ alpha, chroma, count, bp, flg, fm, np) \
.unpack_count = 2, \
.bpp = 2, \
.fetch_mode = fm, \
- .flag = {(flg)}, \
+ .flags = flg, \
.num_planes = np, \
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
}
@@ -121,7 +121,7 @@ flg, fm, np, th) \
.unpack_count = 2, \
.bpp = 2, \
.fetch_mode = fm, \
- .flag = {(flg)}, \
+ .flags = flg, \
.num_planes = np, \
.tile_height = th \
}
@@ -139,7 +139,7 @@ flg, fm, np, th) \
.unpack_count = 2, \
.bpp = 2, \
.fetch_mode = fm, \
- .flag = {(flg)}, \
+ .flags = flg, \
.num_planes = np, \
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
}
@@ -158,7 +158,7 @@ flg, fm, np, th) \
.unpack_count = 2, \
.bpp = 2, \
.fetch_mode = fm, \
- .flag = {(flg)}, \
+ .flags = flg, \
.num_planes = np, \
.tile_height = th \
}
@@ -178,7 +178,7 @@ flg, fm, np) \
.unpack_count = 1, \
.bpp = bp, \
.fetch_mode = fm, \
- .flag = {(flg)}, \
+ .flags = flg, \
.num_planes = np, \
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
}
@@ -1047,7 +1047,7 @@ const struct dpu_format *dpu_get_dpu_format_ext(
DPU_ERROR("unsupported fmt: %4.4s modifier 0x%llX\n",
(char *)&format, modifier);
else
- DRM_DEBUG_ATOMIC("fmt %4.4s mod 0x%llX ubwc %d yuv %d\n",
+ DRM_DEBUG_ATOMIC("fmt %4.4s mod 0x%llX ubwc %d yuv %ld\n",
(char *)&format, modifier,
DPU_FORMAT_IS_UBWC(fmt),
DPU_FORMAT_IS_YUV(fmt));
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
index 31f97f535ce9..ed5206652413 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
@@ -40,23 +40,21 @@ enum dpu_format_flags {
DPU_FORMAT_FLAG_YUV_BIT,
DPU_FORMAT_FLAG_DX_BIT,
DPU_FORMAT_FLAG_COMPRESSED_BIT,
- DPU_FORMAT_FLAG_BIT_MAX,
};
#define DPU_FORMAT_FLAG_YUV BIT(DPU_FORMAT_FLAG_YUV_BIT)
#define DPU_FORMAT_FLAG_DX BIT(DPU_FORMAT_FLAG_DX_BIT)
#define DPU_FORMAT_FLAG_COMPRESSED BIT(DPU_FORMAT_FLAG_COMPRESSED_BIT)
-#define DPU_FORMAT_IS_YUV(X) \
- (test_bit(DPU_FORMAT_FLAG_YUV_BIT, (X)->flag))
-#define DPU_FORMAT_IS_DX(X) \
- (test_bit(DPU_FORMAT_FLAG_DX_BIT, (X)->flag))
+
+#define DPU_FORMAT_IS_YUV(X) ((X)->flags & DPU_FORMAT_FLAG_YUV)
+#define DPU_FORMAT_IS_DX(X) ((X)->flags & DPU_FORMAT_FLAG_DX)
#define DPU_FORMAT_IS_LINEAR(X) ((X)->fetch_mode == MDP_FETCH_LINEAR)
#define DPU_FORMAT_IS_TILE(X) \
(((X)->fetch_mode == MDP_FETCH_UBWC) && \
- !test_bit(DPU_FORMAT_FLAG_COMPRESSED_BIT, (X)->flag))
+ !((X)->flags & DPU_FORMAT_FLAG_COMPRESSED))
#define DPU_FORMAT_IS_UBWC(X) \
(((X)->fetch_mode == MDP_FETCH_UBWC) && \
- test_bit(DPU_FORMAT_FLAG_COMPRESSED_BIT, (X)->flag))
+ ((X)->flags & DPU_FORMAT_FLAG_COMPRESSED))
#define DPU_BLEND_FG_ALPHA_FG_CONST (0 << 0)
#define DPU_BLEND_FG_ALPHA_BG_CONST (1 << 0)
@@ -334,7 +332,7 @@ enum dpu_3d_blend_mode {
* @alpha_enable: whether the format has an alpha channel
* @num_planes: number of planes (including meta data planes)
* @fetch_mode: linear, tiled, or ubwc hw fetch behavior
- * @flag: usage bit flags
+ * @flags: usage bit flags
* @tile_width: format tile width
* @tile_height: format tile height
*/
@@ -351,7 +349,7 @@ struct dpu_format {
u8 alpha_enable;
u8 num_planes;
enum mdp_fetch_mode fetch_mode;
- DECLARE_BITMAP(flag, DPU_FORMAT_FLAG_BIT_MAX);
+ unsigned long flags;
u16 tile_width;
u16 tile_height;
};
--
2.39.2
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