linux-kernel - Re: [RFC PATCH v3 4/6] dt-bindings: clock: meson: document A1 SoC audio clock controller driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <48e9f035-390b-40c9-a3ad-49880c0b972d@kernel.org>
Date: Sun, 21 Apr 2024 20:14:30 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jan Dakinevich <jan.dakinevich@...utedevices.com>,
 Rob Herring <robh@...nel.org>
Cc: Neil Armstrong <neil.armstrong@...aro.org>,
 Jerome Brunet <jbrunet@...libre.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Kevin Hilman <khilman@...libre.com>,
 Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
 Philipp Zabel <p.zabel@...gutronix.de>, Jiucheng Xu
 <jiucheng.xu@...ogic.com>, linux-amlogic@...ts.infradead.org,
 linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [RFC PATCH v3 4/6] dt-bindings: clock: meson: document A1 SoC
 audio clock controller driver

On 20/04/2024 18:15, Jan Dakinevich wrote:
> 
> 
> On 4/20/24 00:09, Rob Herring wrote:
>> On Fri, Apr 19, 2024 at 03:58:10PM +0300, Jan Dakinevich wrote:
>>> Add device tree bindings for A1 SoC audio clock and reset controllers.
>>>
>>> Signed-off-by: Jan Dakinevich <jan.dakinevich@...utedevices.com>
>>> ---
>>>
>>> This controller has 6 mandatory and up to 20 optional clocks. To describe
>>> this, I use 'additionalItems'. It produces correct processed-schema.json:
>>>
>>>   "clock-names": {
>>>       "maxItems": 26,
>>>       "items": [
>>>           {
>>>               "const": "pclk"
>>>           },
>>>           {
>>>               "const": "dds_in"
>>>           },
>>>           {
>>>               "const": "fclk_div2"
>>>           },
>>>           {
>>>               "const": "fclk_div3"
>>>           },
>>>           {
>>>               "const": "hifi_pll"
>>>           },
>>>           {
>>>               "const": "xtal"
>>>           }
>>>       ],
>>>       "additionalItems": {
>>>           "oneOf": [
>>>               {
>>>                   "pattern": "^slv_sclk[0-9]$"
>>>               },
>>>               {
>>>                   "pattern": "^slv_lrclk[0-9]$"
>>>               }
>>>           ]
>>>       },
>>>       "type": "array",
>>>       "minItems": 6
>>>   },
>>>
>>> and it behaves as expected. However, the checking is followed by
>>> complaints like this:
>>>
>>>   Documentation/devicetree/bindings/clock/amlogic,a1-audio-clkc.yaml: properties:clock-names:additionalItems: {'oneOf': [{'pattern': '^slv_sclk[0-9]$'}, {'pattern': '^slv_lrclk[0-9]$'}]} is not of type 'boolean'
>>>
>>> And indeed, 'additionalItems' has boolean type in meta-schema. So, how to
>>> do it right?
>>
>> The meta-schemas are written both to prevent nonsense that json-schema 
>> allows by default (e.g additionalitems (wrong case)) and constraints to 
>> follow the patterns we expect. I'm happy to loosen the latter case if 
>> there's really a need. 
>>
>> Generally, most bindings shouldn't be using 'additionalItems' at all as 
>> all entries should be defined, but there's a few exceptions. Here, the 
>> only reasoning I see is 26 entries is a lot to write out, but that 
>> wouldn't really justify it. 
> 
> Writing a lot of entries don't scary me too much, but the reason is that
> the existence of optional clock sources depends on schematics. Also, we

Aren't you documenting SoC component, not a board? So how exactly it
depends on schematics? SoC is done or not done...

> unable to declare dt-nodes for 'clocks' array in any generic way,
> because their declaration would depends on that what is actually
> connected to the SoC (dt-node could be "fixed-clock" with specific rate
> or something else).

So these are clock inputs to the SoC?

> 
> By the way, I don't know any example (neither for A1 SoC nor for other
> Amlogic's SoCs) where these optional clocks are used, but they are
> allowed by hw.
> 
> This is my understanding of this controller. I hope, Jerome Brunet will
> clarify how it actually works.

Best regards,
Krzysztof