lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240422195904.3591683-8-sean.anderson@linux.dev>
Date: Mon, 22 Apr 2024 15:59:04 -0400
From: Sean Anderson <sean.anderson@...ux.dev>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof WilczyƄski <kw@...ux.com>,
	Rob Herring <robh@...nel.org>,
	linux-pci@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Thippeswamy Havalige <thippeswamy.havalige@....com>,
	Michal Simek <michal.simek@....com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Sean Anderson <sean.anderson@...ux.dev>,
	Ashok Reddy Soma <ashok.reddy.soma@...inx.com>
Subject: [PATCH 7/7] [RFT] arm64: zynqmp: Add PCIe phys

Add PCIe phy bindings for the ZCU102.

Signed-off-by: Sean Anderson <sean.anderson@...ux.dev>
---
I don't have a ZCU102, so please test this.

 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index ad8f23a0ec67..68fe53685351 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -941,6 +941,8 @@ conf-pull-none {
 
 &pcie {
 	status = "okay";
+	phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>;
+	phy-names = "pcie-phy0";
 };
 
 &psgtr {
-- 
2.35.1.1320.gc452695387.dirty


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ