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Message-ID: <a4fcaaad-de8a-4809-9277-ffb63f6227b3@ti.com>
Date: Mon, 22 Apr 2024 17:15:30 -0500
From: Judith Mendez <jm@...com>
To: David Lechner <david@...hnology.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley
<conor+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon
<will@...nel.org>,
William Breathitt Gray <william.gray@...aro.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-iio@...r.kernel.org>
Subject: Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding
On 4/22/24 1:25 PM, David Lechner wrote:
> On 4/18/24 5:14 PM, Judith Mendez wrote:
>> Update eQEP binding for TI K3 devices.
>
>
> It would make more sense to have this patch first in the series
> before the dts changes.
Got it.
>
>>
>> Signed-off-by: Judith Mendez <jm@...com>
>> ---
>> Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>> 1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> index 85f1ff83afe72..11755074c8a91 100644
>> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> @@ -14,19 +14,23 @@ properties:
>> const: ti,am3352-eqep
>>
>
> As Krzysztof hinted, it sounds like we need to add new compatibles
> here and have some -if: statements to account for the differences
> in SoCs rather than making the bindings less strict.
Yes, I see this is the correct action. Thanks.
>
>> reg:
>> - maxItems: 1
>> + minItems: 1
>> + maxItems: 2
>>
>> interrupts:
>> description: The eQEP event interrupt
>> maxItems: 1
>>
>> clocks:
>> - description: The clock that determines the SYSCLKOUT rate for the eQEP
>> + description: The clock that determines the clock rate for the eQEP
>> peripheral.
>> maxItems: 1
>>
>> clock-names:
>> - const: sysclkout
>> + maxItems: 1
>
> In hindsight, this is not the best name. Since we only have one clock
> we don't really need the name anyway, so for the new compatibles, we
> could set clock-names: false.
Ok, will add this to new compatible.
>
>> +
>> + power-domains:
>> + maxItems: 1
>>
>> required:
>> - compatible
>
>
> I see that the CFG0 syscon register on AM62x has some control knobs for
> the EQEP so it would be good to add this to the bindings now too to try
> to make the bindings as complete as possible. (I didn't look at other
> chips so the same may apply to others as well.)
Got it (:
~ Judith
>
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