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Message-ID: <96585fad-4d37-4020-a154-359ccf377906@linux.dev>
Date: Tue, 23 Apr 2024 11:03:26 -0400
From: Sean Anderson <sean.anderson@...ux.dev>
To: Michal Simek <michal.simek@....com>,
 Laurent Pinchart <laurent.pinchart@...asonboard.com>,
 linux-phy@...ts.infradead.org
Cc: Vinod Koul <vkoul@...nel.org>, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org,
 Kishon Vijay Abraham I <kishon@...nel.org>
Subject: Re: [PATCH 2/3] phy: zynqmp: Don't wait for PLL lock on nonzero PCIe
 lanes

On 4/23/24 02:25, Michal Simek wrote:
> 
> 
> On 4/22/24 20:58, Sean Anderson wrote:
>> Similarly to DisplayPort, nonzero PCIe lanes never achieve PLL lock [1].
> 
> What is this [1] for?

I was originally going to have the comment below the fold in the commit
message as a footnote. I forgot to remove this after editing.

--Sean

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