[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240423161006.2522351-3-gnstark@salutedevices.com>
Date: Tue, 23 Apr 2024 19:10:06 +0300
From: George Stark <gnstark@...utedevices.com>
To: <u.kleine-koenig@...gutronix.de>, <neil.armstrong@...aro.org>,
<khilman@...libre.com>, <jbrunet@...libre.com>,
<martin.blumenstingl@...glemail.com>, <thierry.reding@...il.com>,
<hkallweit1@...il.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>
CC: <linux-pwm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-amlogic@...ts.infradead.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <kernel@...utedevices.com>, George Stark
<gnstark@...rdevices.ru>, Dmitry Rokosov <ddrokosov@...utedevices.com>
Subject: [PATCH 2/2] pwm: meson: support meson A1 SoC family
From: George Stark <gnstark@...rdevices.ru>
Add a compatible string and configuration for the meson A1 SoC family
PWM. Additionally, provide an external clock initialization helper
specifically designed for these PWM IPs.
Signed-off-by: George Stark <gnstark@...rdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@...utedevices.com>
---
drivers/pwm/pwm-meson.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index ea96c5973488..529a541ba7b6 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -462,6 +462,33 @@ static int meson_pwm_init_channels_meson8b_v2(struct pwm_chip *chip)
return meson_pwm_init_clocks_meson8b(chip, mux_parent_data);
}
+static int meson_pwm_init_channels_ext_clock(struct pwm_chip *chip)
+{
+ struct device *dev = pwmchip_parent(chip);
+ struct meson_pwm *meson = to_meson_pwm(chip);
+ struct meson_pwm_channel *channels = meson->channels;
+ struct clk_bulk_data *clks = NULL;
+ unsigned int i;
+ int res;
+
+ res = devm_clk_bulk_get_all(dev, &clks);
+ if (res < 0) {
+ dev_err(dev, "can't get device clocks\n");
+ return res;
+ }
+
+ if (res != MESON_NUM_PWMS) {
+ dev_err(dev, "clock count must be %d, got %d\n",
+ MESON_NUM_PWMS, res);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < MESON_NUM_PWMS; i++)
+ channels[i].clk = clks[i].clk;
+
+ return 0;
+}
+
static const struct meson_pwm_data pwm_meson8b_data = {
.parent_names = { "xtal", NULL, "fclk_div4", "fclk_div3" },
.channels_init = meson_pwm_init_channels_meson8b_legacy,
@@ -500,11 +527,19 @@ static const struct meson_pwm_data pwm_meson8_v2_data = {
.channels_init = meson_pwm_init_channels_meson8b_v2,
};
+static const struct meson_pwm_data pwm_meson_ext_clock_data = {
+ .channels_init = meson_pwm_init_channels_ext_clock,
+};
+
static const struct of_device_id meson_pwm_matches[] = {
{
.compatible = "amlogic,meson8-pwm-v2",
.data = &pwm_meson8_v2_data
},
+ {
+ .compatible = "amlogic,meson-a1-pwm",
+ .data = &pwm_meson_ext_clock_data
+ },
/* The following compatibles are obsolete */
{
.compatible = "amlogic,meson8b-pwm",
--
2.25.1
Powered by blists - more mailing lists