linux-kernel - RE: [PATCH v2 3/3] ras/events: Trace CXL CPER events without CXL stack

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Message-ID: <662734b5cd6d4_bbee629455@iweiny-mobl.notmuch>
Date: Mon, 22 Apr 2024 21:10:29 -0700
From: Ira Weiny <ira.weiny@...el.com>
To: Dan Williams <dan.j.williams@...el.com>, Ira Weiny <ira.weiny@...el.com>,
	Dave Jiang <dave.jiang@...el.com>, Jonathan Cameron
	<jonathan.cameron@...wei.com>, Smita Koralahalli
	<Smita.KoralahalliChannabasappa@....com>, Shiju Jose <shiju.jose@...wei.com>
CC: Dan Carpenter <dan.carpenter@...aro.org>, Yazen Ghannam
	<yazen.ghannam@....com>, Davidlohr Bueso <dave@...olabs.net>, "Alison
 Schofield" <alison.schofield@...el.com>, Vishal Verma
	<vishal.l.verma@...el.com>, Ard Biesheuvel <ardb@...nel.org>,
	<linux-efi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-cxl@...r.kernel.org>, Ira Weiny <ira.weiny@...el.com>, "Rafael J.
 Wysocki" <rafael@...nel.org>, Tony Luck <tony.luck@...el.com>, "Borislav
 Petkov" <bp@...en8.de>
Subject: RE: [PATCH v2 3/3] ras/events: Trace CXL CPER events without CXL
 stack

Dan Williams wrote:
> Ira Weiny wrote:
> > If CXL is solely managed by firmware (including HDM configuration and
> > event processing via firmware first) it is possible to run the system
> > without the CXL software loaded.  In this case no CXL callback will be
> > loaded and CXL CPER errors will not be processed at all.
> > 
> > In this case memory device and region (HPA) information is missing but
> > omitting the error completely is not friendly.  Some device information
> > is available the event.
> > 
> > Trace CXL CPER events if the CXL stack is not loaded.  A balance was
> > chosen to decode only the CPER header as this configuration is likely
> > rare.
> 
> I think the justification for this is weak and it pollutes the user ABI.

Do you want me to drop this patch or slim the tracepoint down even
further?

Looking at this again I feel like 

	54ce1927eb78 ("cxl/cper: Fix errant CPER prints for CXL events") 

Was a mistake.  PCI AER errors are both printed in
cper_estatus_print_section() and again printed/traced in pci_print_aer()

Why should CXL be any different?

Ira