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Date: Wed, 24 Apr 2024 14:42:53 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Matthias Schiffer <matthias.schiffer@...tq-group.com>
Cc: Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux@...tq-group.com
Subject: Re: [PATCH net-next] net: phy: marvell: add support for MV88E6020
 internal PHYs

On Wed, Apr 24, 2024 at 02:10:22PM +0200, Matthias Schiffer wrote:
> The embedded PHYs of the MV88E6020 (88E6250 family) switch are very
> basic - they do not even have an Extended Address / Page register.
> 
> This adds support for the PHYs to the driver to set up PHY interrupts
> and retrieve error stats. The ethtool stat functions are slightly
> refactored to allow dealing with different marvell_hw_stat definitions.
> 
> The same code should also work with other 88E6250 family switches
> (6250/6220/6071/6070), but it is unclear whether these use the same PHY
> ID - the spec only lists the prefix 0x01410c00 and describes the lower
> 10 bits as reserved, but that seems too unspecific to be useful, as it
> would cover several existing PHY IDs already supported by the driver.

This sounds like:

https://elixir.bootlin.com/linux/latest/source/drivers/net/dsa/mv88e6xxx/chip.c#L3642

So the DSA driver will fill in the lower bits, and it should work for
all devices in the family.

> @@ -4072,6 +4134,7 @@ static struct mdio_device_id __maybe_unused marvell_tbl[] = {
>  	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
>  	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
>  	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
> +	{ MARVELL_PHY_ID_88E6020, MARVELL_PHY_ID_MASK },
>  	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },

Please follow the naming convention. MARVELL_PHY_ID_88E6250_FAMILY.

       Andrew

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