linux-kernel - Re: [PATCH v2 06/14] arm64: dts: exynos: gs101: Add ufs, ufs-phy and ufs regulator dt nodes

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Date: Thu, 25 Apr 2024 17:35:19 +0100
From: Peter Griffin <peter.griffin@...aro.org>
To: André Draszik <andre.draszik@...aro.org>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, vkoul@...nel.org, kishon@...nel.org, 
	alim.akhtar@...sung.com, avri.altman@....com, bvanassche@....org, 
	s.nawrocki@...sung.com, cw00.choi@...sung.com, jejb@...ux.ibm.com, 
	martin.petersen@...cle.com, James.Bottomley@...senpartnership.com, 
	ebiggers@...nel.org, linux-scsi@...r.kernel.org, 
	linux-phy@...ts.infradead.org, devicetree@...r.kernel.org, 
	linux-clk@...r.kernel.org, linux-samsung-soc@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	tudor.ambarus@...aro.org, saravanak@...gle.com, willmcvicker@...gle.com
Subject: Re: [PATCH v2 06/14] arm64: dts: exynos: gs101: Add ufs, ufs-phy and
 ufs regulator dt nodes

Hi André,

On Thu, 25 Apr 2024 at 13:02, André Draszik <andre.draszik@...aro.org> wrote:
>
> On Tue, 2024-04-23 at 21:49 +0100, Peter Griffin wrote:
> > Enable the ufs controller, ufs phy and ufs regulator in device tree.
> >
> > Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
> > ---
> >  .../boot/dts/exynos/google/gs101-oriole.dts   | 18 ++++++++++
> >  arch/arm64/boot/dts/exynos/google/gs101.dtsi  | 36 +++++++++++++++++++
> >  2 files changed, 54 insertions(+)
> >
>
> [...]
>
> > +
> > +             ufs_0: ufs@...00000 {
> > +                     compatible = "google,gs101-ufs";
> > +                     reg = <0x14700000 0x200>,
> > +                           <0x14701100 0x200>,
> > +                           <0x14780000 0xa000>,
> > +                           <0x14600000 0x100>;
> > +                     reg-names = "hci", "vs_hci", "unipro", "ufsp";
> > +                     interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0>;
> > +                     clocks = <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_ACLK>,
> > +                              <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_CLK_UNIPRO>,
> > +                              <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_FMP_CLK>,
> > +                              <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_ACLK>,
> > +                              <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_PCLK>,
> > +                              <&cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK>;
> > +                     clock-names = "core_clk", "sclk_unipro_main", "fmp",
> > +                                   "ufs_aclk", "ufs_pclk", "sysreg";
> > +                     freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>, <0 0>, <0 0>;
> > +                     pinctrl-names = "default";
> > +                     pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
>
> The preferred order is pinctrl-0 before pinctrl-names (similar to clock-names and reg-names).

Will fix
>
> Other than that,
>
> Acked-by: André Draszik <andre.draszik@...aro.org>

thanks,

Peter