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Message-ID: <6f2053c9-4fa2-43f0-bde1-a93745332997@intel.com>
Date: Thu, 25 Apr 2024 09:47:38 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: "Luck, Tony" <tony.luck@...el.com>, Borislav Petkov <bp@...en8.de>,
 Thomas Gleixner <tglx@...utronix.de>,
 Dave Hansen <dave.hansen@...ux.intel.com>, "x86@...nel.org" <x86@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
 Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, Mark Rutland <mark.rutland@....com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
 "Hunter, Adrian" <adrian.hunter@...el.com>, "H. Peter Anvin"
 <hpa@...or.com>,
 "linux-perf-users@...r.kernel.org" <linux-perf-users@...r.kernel.org>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
 "patches@...ts.linux.dev" <patches@...ts.linux.dev>
Subject: Re: [PATCH v4 24/71] perf/x86/msr: Switch to new Intel CPU model
 defines

On 4/25/24 09:43, Luck, Tony wrote:
>>> @@ -43,75 +43,75 @@ static bool test_intel(int idx, void *data)
>>>          boot_cpu_data.x86 != 6)
>>>              return false;
>> It arguably makes these easier to review when you _aren't_ removing the
>> explicit family 6 checks, but what's the plan for these?  They can go
>> away now, right?
> Yes. I expect that one will have to go if some non-family-6 CPUs are added
> to the switch. I didn't dig into what that function is testing for. But very recent
> CPUs have been added, so it seems likely that future ones will be added too.

Well, my point is that a .x86_vfm switch:

> +	switch (boot_cpu_data.x86_vfm) {
> +	case INTEL_NEHALEM:
> +	case INTEL_NEHALEM_G:

implicitly checks boot_cpu_data.x86==6.  So the explicit check can now
go away, no matter what CPUs are being checked.

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