linux-kernel - Re: [PATCH v4 0/9] Support Zve32[xf] and Zve64[xfd] Vector subextensions

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Message-Id: 
 <171408603081.8761.8620733679475942661.git-patchwork-notify@kernel.org>
Date: Thu, 25 Apr 2024 23:00:30 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Andy Chiu <andy.chiu@...ive.com>
Cc: linux-riscv@...ts.infradead.org, paul.walmsley@...ive.com,
 palmer@...belt.com, aou@...s.berkeley.edu, conor.dooley@...rochip.com,
 heiko@...ech.de, guoren@...nel.org, conor@...nel.org, robh@...nel.org,
 krzysztof.kozlowski+dt@...aro.org, corbet@....net, evan@...osinc.com,
 cleger@...osinc.com, shuah@...nel.org, linux-kernel@...r.kernel.org,
 palmer@...osinc.com, vincent.chen@...ive.com, greentime.hu@...ive.com,
 devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
 linux-kselftest@...r.kernel.org, j.granados@...sung.com
Subject: Re: [PATCH v4 0/9] Support Zve32[xf] and Zve64[xfd] Vector
 subextensions

Hello:

This series was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer@...osinc.com>:

On Fri, 12 Apr 2024 14:48:56 +0800 you wrote:
> The series composes of two parts. The first part provides a quick fix for
> the issue on a recent thread[1]. The issue happens when a platform has
> ununified vector register length across multiple cores. Specifically,
> patch 1 adds a comment at a callsite of riscv_setup_vsize to clarify how
> vlenb is observed by the system. Patch 2 fixes the issue by failing the
> boot process of a secondary core if vlenb mismatches.
> 
> [...]

Here is the summary with links:
  - [v4,1/9] riscv: vector: add a comment when calling riscv_setup_vsize()
    (no matching commit)
  - [v4,2/9] riscv: smp: fail booting up smp if inconsistent vlen is detected
    (no matching commit)
  - [v4,3/9] riscv: cpufeature: call match_isa_ext() for single-letter extensions
    (no matching commit)
  - [v4,4/9] riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection
    (no matching commit)
  - [v4,5/9] dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description
    (no matching commit)
  - [v4,6/9] riscv: hwprobe: add zve Vector subextensions into hwprobe interface
    (no matching commit)
  - [v4,7/9] riscv: vector: adjust minimum Vector requirement to ZVE32X
    (no matching commit)
  - [v4,8/9] hwprobe: fix integer promotion in RISCV_HWPROBE_EXT macro
    https://git.kernel.org/riscv/c/5ea6764d9095
  - [v4,9/9] selftest: run vector prctl test for ZVE32X
    (no matching commit)

You are awesome, thank you!
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