linux-kernel - [PATCH V3 2/3] arm64: zynqmp: Add resets property for UART nodes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240425062358.1347684-3-manikanta.guntupalli@amd.com>
Date: Thu, 25 Apr 2024 11:53:57 +0530
From: Manikanta Guntupalli <manikanta.guntupalli@....com>
To: <git@....com>, <gregkh@...uxfoundation.org>, <jirislaby@...nel.org>,
	<robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
	<michal.simek@....com>, <p.zabel@...gutronix.de>,
	<laurent.pinchart@...asonboard.com>, <radhey.shyam.pandey@....com>,
	<parth.gajjar@....com>, <u.kleine-koenig@...gutronix.de>,
	<tglx@...utronix.de>, <julien.malik@...eenlabs.fr>, <ruanjinjie@...wei.com>,
	<linux-kernel@...r.kernel.org>, <linux-serial@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
CC: <srinivas.goud@....com>, <shubhrajyoti.datta@....com>,
	<manion05gk@...il.com>, Manikanta Guntupalli <manikanta.guntupalli@....com>
Subject: [PATCH V3 2/3] arm64: zynqmp: Add resets property for UART nodes

Add resets property for UART0 and UART1 nodes

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@....com>
---
Changes for V2:
None.
Changes for V3:
None.
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 25d20d803230..935504424ec6 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -906,6 +906,7 @@ uart0: serial@...00000 {
 			reg = <0x0 0xff000000 0x0 0x1000>;
 			clock-names = "uart_clk", "pclk";
 			power-domains = <&zynqmp_firmware PD_UART_0>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_UART0>;
 		};
 
 		uart1: serial@...10000 {
@@ -917,6 +918,7 @@ uart1: serial@...10000 {
 			reg = <0x0 0xff010000 0x0 0x1000>;
 			clock-names = "uart_clk", "pclk";
 			power-domains = <&zynqmp_firmware PD_UART_1>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_UART1>;
 		};
 
 		usb0: usb@...d0000 {
-- 
2.25.1