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Message-ID: <662c3e581f029_b6e029487@dwillia2-mobl3.amr.corp.intel.com.notmuch>
Date: Fri, 26 Apr 2024 16:52:56 -0700
From: Dan Williams <dan.j.williams@...el.com>
To: Ira Weiny <ira.weiny@...el.com>, Dave Jiang <dave.jiang@...el.com>, "Dan
Williams" <dan.j.williams@...el.com>, Jonathan Cameron
<jonathan.cameron@...wei.com>, Smita Koralahalli
<Smita.KoralahalliChannabasappa@....com>, Shiju Jose <shiju.jose@...wei.com>
CC: Dan Carpenter <dan.carpenter@...aro.org>, Yazen Ghannam
<yazen.ghannam@....com>, Davidlohr Bueso <dave@...olabs.net>, "Alison
Schofield" <alison.schofield@...el.com>, Vishal Verma
<vishal.l.verma@...el.com>, Ard Biesheuvel <ardb@...nel.org>,
<linux-efi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-cxl@...r.kernel.org>, Ira Weiny <ira.weiny@...el.com>
Subject: Re: [PATCH v3 2/2] cxl/pci: Process CPER events
Ira Weiny wrote:
> If the firmware has configured CXL event support to be firmware first
> the OS will receive those events through CPER records. The CXL layer has
> unique DPA to HPA knowledge and existing event trace parsing in
> place.[0]
>
> Add a CXL CPER work item and register it with the GHES code to process
> CPER events.
>
> [0]
> Link: https://lore.kernel.org/all/cover.1711598777.git.alison.schofield@intel.com/
Link: http://lore.kernel.org/r/cover.1711598777.git.alison.schofield@intel.com [0]
Otherwise, looks good,
Reviewed-by: Dan Williams <dan.j.williams@...el.com>
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