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Message-Id: <20240426055326.3141727-6-quic_rohiagar@quicinc.com>
Date: Fri, 26 Apr 2024 11:23:25 +0530
From: Rohit Agarwal <quic_rohiagar@...cinc.com>
To: andersson@...nel.org, konrad.dybcio@...aro.org,
manivannan.sadhasivam@...aro.org, jassisinghbrar@...il.com,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
lee@...nel.org
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, kernel@...cinc.com,
Rohit Agarwal <quic_rohiagar@...cinc.com>
Subject: [PATCH 5/6] arm64: dts: qcom: sdx75: Add TCSR register space
Add TCSR register space devicetree node for accessing different
status registers.
Signed-off-by: Rohit Agarwal <quic_rohiagar@...cinc.com>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index aae4b9ef2bb6..f3f30bbcb37d 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -547,6 +547,11 @@ tcsr_mutex: hwlock@...0000 {
#hwlock-cells = <1>;
};
+ tcsr: syscon@...0000 {
+ compatible = "qcom,sdx75-tcsr", "syscon";
+ reg = <0x0 0x01fc0000 0x0 0x30000>;
+ };
+
usb: usb@...8800 {
compatible = "qcom,sdx75-dwc3", "qcom,dwc3";
reg = <0x0 0x0a6f8800 0x0 0x400>;
--
2.25.1
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