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Message-ID: <6ea9dc722218a8498e60612cdcd26e99305c16a8.1714112854.git.perry.yuan@amd.com>
Date: Fri, 26 Apr 2024 14:34:45 +0800
From: Perry Yuan <perry.yuan@....com>
To: <rafael.j.wysocki@...el.com>, <Mario.Limonciello@....com>,
<viresh.kumar@...aro.org>, <Ray.Huang@....com>, <gautham.shenoy@....com>,
<Borislav.Petkov@....com>
CC: <Alexander.Deucher@....com>, <Xinmei.Huang@....com>,
<Xiaojian.Du@....com>, <Li.Meng@....com>, <linux-pm@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v8 2/6] cpufreq: amd-pstate: initialize new core precision boost state
From: Perry Yuan <Perry.Yuan@....com>
Add one global `global_params` to represent CPU Performance Boost(cpb)
state for cpu frequency scaling, both active and passive modes all can
support CPU cores frequency boosting control which is based on the BIOS
setting, while BIOS turn on the "Core Performance Boost", it will
allow OS control each core highest perf limitation from OS side.
The active, guided and passive modes of the amd-pstate driver can
support frequency boost control when the "Core Performance Boost"
(CPB) feature is enabled in the BIOS. When enabled in BIOS, the user
has an option at runtime to allow/disallow the cores from operating in
the boost frequency range.
Add an amd_pstate_global_params object to record whether CPB is
enabled in BIOS, and if it has been activated by the user
Reported-by: Artem S. Tashkinov" <aros@....com>
Cc: Oleksandr Natalenko <oleksandr@...alenko.name>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217931
Signed-off-by: Perry Yuan <Perry.Yuan@....com>
---
drivers/cpufreq/amd-pstate.c | 45 +++++++++++++++++++++++++++---------
include/linux/amd-pstate.h | 13 +++++++++++
2 files changed, 47 insertions(+), 11 deletions(-)
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 83a29b257794..aa17a3134497 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -68,6 +68,8 @@ static int cppc_state = AMD_PSTATE_UNDEFINED;
static bool cppc_enabled;
static bool amd_pstate_prefcore = true;
static struct quirk_entry *quirks;
+struct amd_pstate_global_params amd_pstate_global_params;
+EXPORT_SYMBOL_GPL(amd_pstate_global_params);
/*
* AMD Energy Preference Performance (EPP)
@@ -647,7 +649,7 @@ static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state)
if (!cpudata->boost_supported) {
pr_err("Boost mode is not supported by this processor or SBIOS\n");
- return -EINVAL;
+ return -ENOTSUPP;
}
if (state)
@@ -665,18 +667,31 @@ static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state)
return 0;
}
-static void amd_pstate_boost_init(struct amd_cpudata *cpudata)
+static int amd_pstate_boost_init(struct amd_cpudata *cpudata)
{
- u32 highest_perf, nominal_perf;
+ u64 boost_val;
+ int ret;
- highest_perf = READ_ONCE(cpudata->highest_perf);
- nominal_perf = READ_ONCE(cpudata->nominal_perf);
+ if (!boot_cpu_has(X86_FEATURE_CPB)) {
+ cpudata->boost_supported = false;
+ current_pstate_driver->boost_enabled = false;
+ pr_debug_once("Boost CPB capabilities not present in the processor\n");
+ return -ENOTSUPP;
+ }
- if (highest_perf <= nominal_perf)
- return;
+ ret = rdmsrl_on_cpu(cpudata->cpu, MSR_K7_HWCR, &boost_val);
+ if (ret) {
+ pr_err_once("failed to read initial CPU boost state!\n");
+ return ret;
+ }
- cpudata->boost_supported = true;
- current_pstate_driver->boost_enabled = true;
+ amd_pstate_global_params.cpb_supported = !(boost_val & MSR_K7_HWCR_CPB_DIS);
+ if (amd_pstate_global_params.cpb_supported)
+ current_pstate_driver->boost_enabled = true;
+
+ amd_pstate_global_params.cpb_boost = amd_pstate_global_params.cpb_supported;
+
+ return ret;
}
static void amd_perf_ctl_reset(unsigned int cpu)
@@ -900,6 +915,11 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
amd_pstate_init_prefcore(cpudata);
+ /* initialize cpu cores boot state */
+ ret = amd_pstate_boost_init(cpudata);
+ if (ret)
+ goto free_cpudata1;
+
ret = amd_pstate_init_perf(cpudata);
if (ret)
goto free_cpudata1;
@@ -956,7 +976,6 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
policy->driver_data = cpudata;
- amd_pstate_boost_init(cpudata);
if (!current_pstate_driver->adjust_perf)
current_pstate_driver->adjust_perf = amd_pstate_adjust_perf;
@@ -1363,6 +1382,11 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
amd_pstate_init_prefcore(cpudata);
+ /* initialize cpu cores boot state */
+ ret = amd_pstate_boost_init(cpudata);
+ if (ret)
+ goto free_cpudata1;
+
ret = amd_pstate_init_perf(cpudata);
if (ret)
goto free_cpudata1;
@@ -1417,7 +1441,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
return ret;
WRITE_ONCE(cpudata->cppc_cap1_cached, value);
}
- amd_pstate_boost_init(cpudata);
return 0;
diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h
index d58fc022ec46..8ba5dd4d3405 100644
--- a/include/linux/amd-pstate.h
+++ b/include/linux/amd-pstate.h
@@ -134,4 +134,17 @@ struct quirk_entry {
u32 lowest_freq;
};
+/**
+ * struct amd_pstate_global_params - Global parameters, mostly tunable via sysfs.
+ * @cpb_boost: Whether or not to use boost CPU P-states.
+ * @cpb_supported: Whether or not CPU boost P-states are available
+ * based on the MSR_K7_HWCR bit[25] state
+ */
+struct amd_pstate_global_params {
+ bool cpb_boost;
+ bool cpb_supported;
+};
+
+extern struct amd_pstate_global_params amd_pstate_global_params;
+
#endif /* _LINUX_AMD_PSTATE_H */
--
2.34.1
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