Message-ID: <mhng-2f5e2c44-3944-4a0e-9669-12967d8e6f15@palmer-ri-x1c9>
Date: Sat, 27 Apr 2024 07:56:54 -0700 (PDT)
From: Palmer Dabbelt <palmer@...osinc.com>
To: Linus Torvalds <torvalds@...ux-foundation.org>
CC:        linux-kernel@...r.kernel.org,         linux-riscv@...ts.infradead.org
Subject: [GIT PULL] RISC-V Fixes for 6.9-rc6

The following changes since commit d14fa1fcf69db9d070e75f1c4425211fa619dfc8:

  riscv: process: Fix kernel gp leakage (2024-04-04 12:35:05 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.9-rc6

for you to fetch changes up to 6beb6bc5a81e1433a1534e75173f67d42a6f225a:

  Merge patch series "RISC-V: Test th.sxstatus.MAEE bit before enabling MAEE" (2024-04-26 10:21:57 -0700)

----------------------------------------------------------------
RISC-V Fixes for 6.9-rc6

* A fix for TASK_SIZE on rv64/NOMMU, to reflect the lack of user/kernel
  separation.
* A fix to avoid loading rv64/NOMMU kernel past the start of RAM.
* A fix for RISCV_HWPROBE_EXT_ZVFHMIN on ilp32 to avoid signed integer
  overflow in the bitmask.
* The sud_test kselftest has been fixed to properly swizzle the syscall
  number into the return register, which are not the same on RISC-V.
* A fix for a build warning in the perf tools on rv32.
* A fix for the CBO selftests, to avoid non-constants leaking into the
  inline asm.
* A pair of fixes for T-Head PBMT errata probing, which has been renamed
  MAE by the vendor.

----------------------------------------------------------------
Sorry this is late, but I found an issue in one of the patches as I was looking
through yesterday and dropped it, so I wanted to make sure everything got a
chance to make it through linux-next.

No big deal if this doesn't make it to rc6, nothing is super critical.  They're
all fixes, though, so I figured it'd be better to just send this now rather
than waiting for next week.

----------------------------------------------------------------
Andrew Jones (1):
      RISC-V: selftests: cbo: Ensure asm operands match constraints, take 2

Ben Zong-You Xie (1):
      perf riscv: Fix the warning due to the incompatible type

Christoph Müllner (2):
      riscv: thead: Rename T-Head PBMT to MAE
      riscv: T-Head: Test availability bit before enabling MAE errata

Clément Léger (2):
      riscv: hwprobe: fix invalid sign extension for RISCV_HWPROBE_EXT_ZVFHMIN
      selftests: sud_test: return correct emulated syscall value on RISC-V

Palmer Dabbelt (2):
      Merge patch the fixes from "riscv: 64-bit NOMMU fixes and enhancements"
      Merge patch series "RISC-V: Test th.sxstatus.MAEE bit before enabling MAEE"

Samuel Holland (2):
      riscv: Fix TASK_SIZE on 64-bit NOMMU
      riscv: Fix loading 64-bit NOMMU kernels past the start of RAM

 arch/riscv/Kconfig.errata                          |  8 ++++----
 arch/riscv/errata/thead/errata.c                   | 24 ++++++++++++++--------
 arch/riscv/include/asm/errata_list.h               | 20 +++++++++---------
 arch/riscv/include/asm/page.h                      |  2 +-
 arch/riscv/include/asm/pgtable.h                   |  2 +-
 arch/riscv/include/uapi/asm/hwprobe.h              |  2 +-
 arch/riscv/mm/init.c                               |  2 +-
 tools/perf/arch/riscv/util/header.c                |  2 +-
 tools/testing/selftests/riscv/hwprobe/cbo.c        |  2 +-
 tools/testing/selftests/riscv/hwprobe/hwprobe.h    | 10 +++++++++
 .../selftests/syscall_user_dispatch/sud_test.c     | 14 +++++++++++++
 11 files changed, 59 insertions(+), 29 deletions(-)

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