[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <479aeb87-ddc1-421a-a451-d9e62893eef5@linaro.org>
Date: Mon, 29 Apr 2024 19:45:54 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Alim Akhtar <alim.akhtar@...sung.com>,
Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Tomasz Figa <tomasz.figa@...il.com>,
Peter Griffin <peter.griffin@...aro.org>,
André Draszik <andre.draszik@...aro.org>
Cc: Tudor Ambarus <tudor.ambarus@...aro.org>,
Will McVicker <willmcvicker@...gle.com>,
Sam Protsenko <semen.protsenko@...aro.org>, kernel-team@...roid.com,
linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/2] clock support for Samsung Exynos pin controller
(Google Tensor gs101)
On 29/04/2024 19:28, Krzysztof Kozlowski wrote:
>
> On Fri, 26 Apr 2024 14:25:13 +0100, André Draszik wrote:
>> This series enables clock support on the Samsung Exynos pin controller
>> driver.
>>
>> This is required on Socs like Google Tensor gs101, which implement
>> fine-grained clock control / gating, and as such a running bus clock is
>> required for register access to work.
>>
Where's the DTS?
Best regards,
Krzysztof
Powered by blists - more mailing lists