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Date: Mon, 29 Apr 2024 11:35:13 -0700
From: Dan Williams <dan.j.williams@...el.com>
To: Bjorn Helgaas <helgaas@...nel.org>, PJ Waskiewicz <ppwaskie@...nel.org>
CC: Dan Williams <dan.j.williams@...el.com>, <linux-cxl@...r.kernel.org>,
	<linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] cxl/acpi.c: Add buggy BIOS hint for CXL ACPI lookup
 failure

Bjorn Helgaas wrote:
> On Sun, Apr 28, 2024 at 10:57:13PM -0700, PJ Waskiewicz wrote:
> > On Tue, 2024-04-09 at 08:22 -0500, Bjorn Helgaas wrote:
> > > On Sun, Apr 07, 2024 at 02:05:26PM -0700, ppwaskie@...nel.org wrote:
> > > > From: PJ Waskiewicz <ppwaskie@...nel.org>
> > > > 
> > > > Currently, Type 3 CXL devices (CXL.mem) can train using host CXL
> > > > drivers on Emerald Rapids systems.  However, on some production
> > > > systems from some vendors, a buggy BIOS exists that improperly
> > > > populates the ACPI => PCI mappings.
> > > 
> > > Can you be more specific about what this ACPI => PCI mapping is?
> > > If you already know what the problem is, I'm sure this is obvious,
> > > but otherwise it's not.
[..] 
> It's just a buggy BIOS that doesn't supply _UID for an ACPI0016
> object, so you can't locate the corresponding CEDT entry, right?

Correct, the problem is 100% contained to ACPI, and PCI is innocent. The
ACPI bug leads to failures to associate ACPI host-bridge objects with
CEDT.CHBS entries.

ACPI to PCI association is then typical pci_root lookup, i.e.:

        pci_root = acpi_pci_find_root(hb->handle);
        bridge = pci_root->bus->bridge;

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