lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <40eee0ca-fb15-40c7-80be-a1198f37663d@linaro.org>
Date: Mon, 29 Apr 2024 08:18:21 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Jingbao Qiu <qiujingbao.dlmu@...il.com>, broonie@...nel.org,
 robh@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
 unicorn_wang@...look.com, inochiama@...look.com, paul.walmsley@...ive.com,
 palmer@...belt.com, aou@...s.berkeley.edu
Cc: dlan@...too.org, linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v1 1/2] dt-bindings: mtd: add sophgo spi-nor-controller

On 27/04/2024 09:54, Jingbao Qiu wrote:
> Add YAML bindings for cv1800 spi nor controller.
> 
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@...il.com>
> ---
>  .../bindings/spi/sophgo,spi-cv1800-nor.yaml   | 33 +++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
> new file mode 100644
> index 000000000000..121a80fbf2d5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml

Filename like compatible.


> @@ -0,0 +1,33 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/sophgo,spi-cv1800-nor.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SPI controller for Sophgo RISC-V SoCs
> +
> +maintainers:
> +  - Jingbao Qiu <qiujingbao.dlmu@...il.com>
> +
> +allOf:
> +  - $ref: /schemas/spi/spi-controller.yaml#
> +
> +properties:
> +  compatible:
> +    const: sophgo,cv1800b-nor

A bit unusual that compatible has nothing in common with tile of the
binding, thus the name of the hardware block.

> +
> +  reg:
> +    maxItems: 1

No clocks? No interrupts? This looks incomplete.

> +
> +required:
> +  - compatible
> +  - reg


Best regards,
Krzysztof


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ