linux-kernel - Re: [PATCH v1 2/2] arm64: dts: qcom: sa8775p: Set max link speed to gen4 for ep pcie

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Message-ID: <CAA8EJprnO84T+mbUD-T55T0zU0ngWFnpa4i8EfWxu0UzJZuzgw@mail.gmail.com>
Date: Tue, 30 Apr 2024 20:50:15 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Mrinmay Sarkar <quic_msarkar@...cinc.com>
Cc: andersson@...nel.org, krzysztof.kozlowski+dt@...aro.org, 
	conor+dt@...nel.org, konrad.dybcio@...aro.org, 
	manivannan.sadhasivam@...aro.org, quic_shazhuss@...cinc.com, 
	quic_nitegupt@...cinc.com, quic_ramkri@...cinc.com, quic_nayiluri@...cinc.com, 
	quic_krichai@...cinc.com, quic_vbadigan@...cinc.com, 
	quic_schintav@...cinc.com, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, linux-arm-msm@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 2/2] arm64: dts: qcom: sa8775p: Set max link speed to
 gen4 for ep pcie

On Tue, 30 Apr 2024 at 19:33, Mrinmay Sarkar <quic_msarkar@...cinc.com> wrote:
>
> Adding this change to set max link speed to gen4 as sa8775p supports
> gen4 so that pcie link can be enumerated as gen4.

Previous patches mentioned stability issues. Were they solved?


>
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@...cinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 0c52180..aad2cd7 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -3730,7 +3730,7 @@
>                 power-domains = <&gcc PCIE_0_GDSC>;
>                 phys = <&pcie0_phy>;
>                 phy-names = "pciephy";
> -               max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
> +               max-link-speed = <4>;
>                 num-lanes = <2>;
>
>                 status = "disabled";
> @@ -3888,7 +3888,7 @@
>                 power-domains = <&gcc PCIE_1_GDSC>;
>                 phys = <&pcie1_phy>;
>                 phy-names = "pciephy";
> -               max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */

I think you've just sent a patchset which adds this node. Is there any
reason for setting the max-link-speed to 3 just to change it to 4
immediately?

> +               max-link-speed = <4>;
>                 num-lanes = <4>;
>
>                 status = "disabled";
> --
> 2.7.4
>
>


--
With best wishes

Dmitry