linux-kernel - [PATCH v7 11/12] Documentation: driver-api: pps: Add Intel Timed I/O PPS generator

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20240430085225.18086-12-lakshmi.sowjanya.d@intel.com>
Date: Tue, 30 Apr 2024 14:22:24 +0530
From: lakshmi.sowjanya.d@...el.com
To: tglx@...utronix.de,
	jstultz@...gle.com,
	giometti@...eenne.com,
	corbet@....net,
	linux-kernel@...r.kernel.org
Cc: x86@...nel.org,
	netdev@...r.kernel.org,
	linux-doc@...r.kernel.org,
	intel-wired-lan@...ts.osuosl.org,
	andriy.shevchenko@...ux.intel.com,
	eddie.dong@...el.com,
	christopher.s.hall@...el.com,
	jesse.brandeburg@...el.com,
	davem@...emloft.net,
	alexandre.torgue@...s.st.com,
	joabreu@...opsys.com,
	mcoquelin.stm32@...il.com,
	perex@...ex.cz,
	linux-sound@...r.kernel.org,
	anthony.l.nguyen@...el.com,
	peter.hilber@...nsynergy.com,
	pandith.n@...el.com,
	subramanian.mohan@...el.com,
	thejesh.reddy.t.r@...el.com,
	lakshmi.sowjanya.d@...el.com
Subject: [PATCH v7 11/12] Documentation: driver-api: pps: Add Intel Timed I/O PPS generator

From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@...el.com>

Add Intel Timed I/O PPS usage instructions.

Co-developed-by: Pandith N <pandith.n@...el.com>
Signed-off-by: Pandith N <pandith.n@...el.com>
Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@...el.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Acked-by: Rodolfo Giometti <giometti@...eenne.com>
---
 Documentation/driver-api/pps.rst | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/Documentation/driver-api/pps.rst b/Documentation/driver-api/pps.rst
index 78dded03e5d8..52a6d5faf885 100644
--- a/Documentation/driver-api/pps.rst
+++ b/Documentation/driver-api/pps.rst
@@ -246,3 +246,25 @@ delay between assert and clear edge as small as possible to reduce system
 latencies. But if it is too small slave won't be able to capture clear edge
 transition. The default of 30us should be good enough in most situations.
 The delay can be selected using 'delay' pps_gen_parport module parameter.
+
+
+Intel Timed I/O PPS signal generator
+------------------------------------
+
+Intel Timed I/O is a high precision device, present on 2019 and newer Intel
+CPUs, that can generate PPS signals.
+
+Timed I/O and system time are both driven by same hardware clock. The signal
+is generated with a precision of ~20 nanoseconds. The generated PPS signal
+is used to synchronize an external device with system clock. For example,
+share your clock with a device that receives PPS signal, generated by
+Timed I/O device. There are dedicated Timed I/O pins to deliver the PPS signal
+to an external device.
+
+Usage of Intel Timed I/O as PPS generator:
+
+Start generating PPS signal::
+        $echo 1 > /sys/devices/platform/INTCxxxx\:00/enable
+
+Stop generating PPS signal::
+        $echo 0 > /sys/devices/platform/INTCxxxx\:00/enable
-- 
2.35.3