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Message-Id: <20240430093724.2692232-1-claudiu.beznea.uj@bp.renesas.com>
Date: Tue, 30 Apr 2024 12:37:24 +0300
From: Claudiu <claudiu.beznea@...on.dev>
To: wsa+renesas@...g-engineering.com,
ulf.hansson@...aro.org
Cc: linux-mmc@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
linux-kernel@...r.kernel.org,
claudiu.beznea@...on.dev,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>,
Hien Huynh <hien.huynh.px@...esas.com>
Subject: [PATCH v3] mmc: renesas_sdhi: Set the SDBUF after reset
From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
For development purpose, renesas_sdhi_probe() could be called w/
dma_ops = NULL to force the usage of PIO mode. In this case the
renesas_sdhi_enable_dma() will not be called before transferring data.
If renesas_sdhi_enable_dma() is not called, renesas_sdhi_clk_enable()
call from renesas_sdhi_probe() will configure SDBUF by calling the
renesas_sdhi_sdbuf_width() function, but then SDBUF will be reset in
tmio_mmc_host_probe() when calling tmio_mmc_reset() though host->reset().
If SDBUF is zero the data transfer will not work in PIO mode for RZ/G3S.
To fix this call again the renesas_sdhi_sdbuf_width(host, 16) in
renesas_sdhi_reset(). The call of renesas_sdhi_sdbuf_width() was not
removed from renesas_sdhi_clk_enable() as the host->reset() is optional.
Co-developed-by: Hien Huynh <hien.huynh.px@...esas.com>
Signed-off-by: Hien Huynh <hien.huynh.px@...esas.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
---
Changes in v3:
- shortened the comment introduced in renesas_sdhi_reset()
Changes in v2:
- fixed typos in commit description
- limit the comment lines to 80 chars
drivers/mmc/host/renesas_sdhi_core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index f84f60139bcf..d9503f9f6e96 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -589,6 +589,9 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host, bool preserve)
sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
priv->needs_adjust_hs400 = false;
renesas_sdhi_set_clock(host, host->clk_cache);
+
+ /* Ensure default value for this driver. */
+ renesas_sdhi_sdbuf_width(host, 16);
} else if (priv->scc_ctl) {
renesas_sdhi_scc_reset(host, priv);
}
--
2.39.2
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