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Message-ID: <8164fe59-dde6-41b3-8e9d-8e050d1c7109@microchip.com>
Date: Tue, 30 Apr 2024 11:30:10 +0000
From: <Parthiban.Veerasooran@...rochip.com>
To: <horms@...nel.org>
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Subject: Re: [PATCH net-next v4 01/12] Documentation: networking: add OPEN
Alliance 10BASE-T1x MAC-PHY serial interface
Hi Simon,
On 29/04/24 9:47 pm, Simon Horman wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Thu, Apr 18, 2024 at 06:26:37PM +0530, Parthiban Veerasooran wrote:
>> The IEEE 802.3cg project defines two 10 Mbit/s PHYs operating over a
>> single pair of conductors. The 10BASE-T1L (Clause 146) is a long reach
>> PHY supporting full duplex point-to-point operation over 1 km of single
>> balanced pair of conductors. The 10BASE-T1S (Clause 147) is a short reach
>> PHY supporting full / half duplex point-to-point operation over 15 m of
>> single balanced pair of conductors, or half duplex multidrop bus
>> operation over 25 m of single balanced pair of conductors.
>>
>> Furthermore, the IEEE 802.3cg project defines the new Physical Layer
>> Collision Avoidance (PLCA) Reconciliation Sublayer (Clause 148) meant to
>> provide improved determinism to the CSMA/CD media access method. PLCA
>> works in conjunction with the 10BASE-T1S PHY operating in multidrop mode.
>>
>> The aforementioned PHYs are intended to cover the low-speed / low-cost
>> applications in industrial and automotive environment. The large number
>> of pins (16) required by the MII interface, which is specified by the
>> IEEE 802.3 in Clause 22, is one of the major cost factors that need to be
>> addressed to fulfil this objective.
>>
>> The MAC-PHY solution integrates an IEEE Clause 4 MAC and a 10BASE-T1x PHY
>> exposing a low pin count Serial Peripheral Interface (SPI) to the host
>> microcontroller. This also enables the addition of Ethernet functionality
>> to existing low-end microcontrollers which do not integrate a MAC
>> controller.
>>
>> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
>
> Hi Parthiban,
>
> Some minor feedback from my side.
>
>> ---
>> Documentation/networking/oa-tc6-framework.rst | 491 ++++++++++++++++++
>
> Please add oa-tc6-framework to
>
> Flagged by: make SPHINXDIRS="networking" htmldocs
OK. Thanks for pointing this. Will correct it in the next version.
>
>> MAINTAINERS | 6 +
>> 2 files changed, 497 insertions(+)
>> create mode 100644 Documentation/networking/oa-tc6-framework.rst
>>
>> diff --git a/Documentation/networking/oa-tc6-framework.rst b/Documentation/networking/oa-tc6-framework.rst
>
> ...
>
>> +Device drivers API
>> +==================
>> +
>> +The include/linux/oa_tc6.h defines the following functions:
>> +
>> +.. c:function:: struct oa_tc6 *oa_tc6_init(struct spi_device *spi,
>> + struct net_device *netdev)
>
> I think that you need to use a '\' to escape newlines
> for a for a multi-line c:function.
>
> e.g.
> .. c:function:: struct oa_tc6 *oa_tc6_init(struct spi_device *spi, \
> struct net_device *netdev)
>
> Link: https://www.sphinx-doc.org/en/master/usage/domains/index.html
>
> Flagged by make SPHINXDIRS="networking" htmldocs
> when using Sphinx 7.2.6
Yes noted. Will correct it in the next version.
Best regards,
Parthiban V
>
>> +
>> +Initialize OA TC6 lib.
>> +
>> +.. c:function:: void oa_tc6_exit(struct oa_tc6 *tc6)
>> +
>> +Free allocated OA TC6 lib.
>> +
>> +.. c:function:: int oa_tc6_write_register(struct oa_tc6 *tc6, u32 address,
>> + u32 value)
>> +
>> +Write a single register in the MAC-PHY.
>> +
>> +.. c:function:: int oa_tc6_write_registers(struct oa_tc6 *tc6, u32 address,
>> + u32 value[], u8 length)
>> +
>> +Writing multiple consecutive registers starting from @address in the MAC-PHY.
>> +Maximum of 128 consecutive registers can be written starting at @address.
>> +
>> +.. c:function:: int oa_tc6_read_register(struct oa_tc6 *tc6, u32 address,
>> + u32 *value)
>> +
>> +Read a single register in the MAC-PHY.
>> +
>> +.. c:function:: int oa_tc6_read_registers(struct oa_tc6 *tc6, u32 address,
>> + u32 value[], u8 length)
>> +
>> +Reading multiple consecutive registers starting from @address in the MAC-PHY.
>> +Maximum of 128 consecutive registers can be read starting at @address.
>> +
>> +.. c:function:: netdev_tx_t oa_tc6_start_xmit(struct oa_tc6 *tc6,
>> + struct sk_buff *skb);
>> +
>> +The transmit Ethernet frame in the skb is or going to be transmitted through
>> +the MAC-PHY.
>
> ...
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