linux-kernel - Re: [PATCH v3 3/3] PCI: qcom: Add rx margining settings for 16GT/s

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Message-ID: <5a9a0c90-d191-49e1-8cd5-1d45c82040ac@linaro.org>
Date: Thu, 2 May 2024 01:13:45 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Shashank Babu Chinta Venkata <quic_schintav@...cinc.com>,
 agross@...nel.org, andersson@...nel.org, mani@...nel.org
Cc: quic_msarkar@...cinc.com, quic_kraravin@...cinc.com,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof Wilczyński <kw@...ux.com>,
 Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
 Jingoo Han <jingoohan1@...il.com>,
 Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
 Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
 Serge Semin <fancer.lancer@...il.com>,
 Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
 Conor Dooley <conor.dooley@...rochip.com>, linux-kernel@...r.kernel.org,
 linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v3 3/3] PCI: qcom: Add rx margining settings for 16GT/s

[...]

>>>   EXPORT_SYMBOL_GPL(qcom_pcie_common_set_16gt_eq_settings);
>>>   +void qcom_pcie_common_set_16gt_rx_margining_settings(struct dw_pcie *pci)
>>> +{
>>> +    u32 reg;
>>> +
>>> +    reg = dw_pcie_readl_dbi(pci, GEN4_LANE_MARGINING_1_OFF);
>>> +    reg = MARGINING_MAX_VOLTAGE_OFFSET(0x24) |
>>> +        MARGINING_NUM_VOLTAGE_STEPS(0x78) |
>>> +        MARGINING_MAX_TIMING_OFFSET(0x32) |
>>> +        MARGINING_NUM_TIMING_STEPS(0x10);
>>> +    dw_pcie_writel_dbi(pci, GEN4_LANE_MARGINING_1_OFF, reg);
>>
>> Since this is DW-common, why is this inside the qcom driver?
> Though this register space is in dw-common specific, these settings are purely vendor specific . These settings are determined by systems team on vendor hardware, as these settings are used as margin to compensate signal variance due to various physical factors(like connection length, retimers etc).

Okay, so:

1. is the register layout vendor-specific too? i.e. are the bitfields DW-common?

2. will these settings work on all Qualcomm devices, regardless of SoC/board/
retimers used etc.?

Konrad