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Message-ID: <CAJ9a7Vjj++Bvu2EFVxpXvW4nes0qxVqjxgBWwi1L904p86a7gw@mail.gmail.com>
Date: Wed, 1 May 2024 11:31:56 +0100
From: Mike Leach <mike.leach@...aro.org>
To: James Clark <james.clark@....com>
Cc: linux-perf-users@...r.kernel.org, gankulkarni@...amperecomputing.com, 
	scclevenger@...amperecomputing.com, coresight@...ts.linaro.org, 
	suzuki.poulose@....com, 
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>, 
	Maxime Coquelin <mcoquelin.stm32@...il.com>, Alexandre Torgue <alexandre.torgue@...s.st.com>, 
	Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>, 
	Arnaldo Carvalho de Melo <acme@...nel.org>, Namhyung Kim <namhyung@...nel.org>, 
	Mark Rutland <mark.rutland@....com>, Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>, 
	Adrian Hunter <adrian.hunter@...el.com>, John Garry <john.g.garry@...cle.com>, 
	Will Deacon <will@...nel.org>, Leo Yan <leo.yan@...ux.dev>, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	linux-stm32@...md-mailman.stormreply.com
Subject: Re: [PATCH 11/17] coresight: Expose map argument in trace ID API

Hi James,

On Mon, 29 Apr 2024 at 16:25, James Clark <james.clark@....com> wrote:
>
> The trace ID API is currently hard coded to always use the global map.
> The functions that take the map as an argument aren't currently public.
> Make them public so that Perf mode can pass in its own maps. At the
> moment all usages are still hard coded to use the global map, but now
> on the caller side.
>
> System ID functions are unchanged because they will always use the
> default map.
>
> Signed-off-by: James Clark <james.clark@....com>
> ---
>  .../hwtracing/coresight/coresight-etm-perf.c  |  5 +++--
>  .../coresight/coresight-etm3x-core.c          |  5 +++--
>  .../coresight/coresight-etm4x-core.c          |  5 +++--
>  .../hwtracing/coresight/coresight-trace-id.c  | 22 +++++++------------
>  .../hwtracing/coresight/coresight-trace-id.h  |  9 +++++---
>  5 files changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index c0c60e6a1703..4afb9d29f355 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -232,7 +232,7 @@ static void free_event_data(struct work_struct *work)
>                 if (!(IS_ERR_OR_NULL(*ppath)))
>                         coresight_release_path(*ppath);
>                 *ppath = NULL;
> -               coresight_trace_id_put_cpu_id(cpu);
> +               coresight_trace_id_put_cpu_id(cpu, coresight_trace_id_map_default());
>         }
>
>         /* mark perf event as done for trace id allocator */
> @@ -401,7 +401,8 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
>                 }
>
>                 /* ensure we can allocate a trace ID for this CPU */
> -               trace_id = coresight_trace_id_get_cpu_id(cpu);
> +               trace_id = coresight_trace_id_get_cpu_id(cpu,
> +                                                        coresight_trace_id_map_default());
>                 if (!IS_VALID_CS_TRACE_ID(trace_id)) {
>                         cpumask_clear_cpu(cpu, mask);
>                         coresight_release_path(path);
> diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c
> index 9d5c1391ffb1..4149e7675ceb 100644
> --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c
> @@ -465,7 +465,8 @@ int etm_read_alloc_trace_id(struct etm_drvdata *drvdata)
>          *
>          * trace id function has its own lock
>          */
> -       trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu);
> +       trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu,
> +                                                coresight_trace_id_map_default());
>         if (IS_VALID_CS_TRACE_ID(trace_id))
>                 drvdata->traceid = (u8)trace_id;
>         else
> @@ -477,7 +478,7 @@ int etm_read_alloc_trace_id(struct etm_drvdata *drvdata)
>
>  void etm_release_trace_id(struct etm_drvdata *drvdata)
>  {
> -       coresight_trace_id_put_cpu_id(drvdata->cpu);
> +       coresight_trace_id_put_cpu_id(drvdata->cpu, coresight_trace_id_map_default());
>  }
>
>  static int etm_enable_perf(struct coresight_device *csdev,
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index a0bdfabddbc6..f32c8cd7742d 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -241,7 +241,8 @@ int etm4_read_alloc_trace_id(struct etmv4_drvdata *drvdata)
>          * or return the one currently allocated.
>          * The trace id function has its own lock
>          */
> -       trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu);
> +       trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu,
> +                                                coresight_trace_id_map_default());
>         if (IS_VALID_CS_TRACE_ID(trace_id))
>                 drvdata->trcid = (u8)trace_id;
>         else
> @@ -253,7 +254,7 @@ int etm4_read_alloc_trace_id(struct etmv4_drvdata *drvdata)
>
>  void etm4_release_trace_id(struct etmv4_drvdata *drvdata)
>  {
> -       coresight_trace_id_put_cpu_id(drvdata->cpu);
> +       coresight_trace_id_put_cpu_id(drvdata->cpu, coresight_trace_id_map_default());
>  }
>
>  struct etm4_enable_arg {
> diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwtracing/coresight/coresight-trace-id.c
> index 19005b5b4dc4..45ddd50d09a6 100644
> --- a/drivers/hwtracing/coresight/coresight-trace-id.c
> +++ b/drivers/hwtracing/coresight/coresight-trace-id.c
> @@ -12,7 +12,7 @@
>
>  #include "coresight-trace-id.h"
>
> -/* Default trace ID map. Used on systems that don't require per sink mappings */
> +/* Default trace ID map. Used in sysfs mode and for system sources */
>  static struct coresight_trace_id_map id_map_default;
>
>  /* maintain a record of the mapping of IDs and pending releases per cpu */
> @@ -152,7 +152,7 @@ static void coresight_trace_id_release_all_pending(void)
>         DUMP_ID_MAP(id_map);
>  }
>
> -static int coresight_trace_id_map_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map)
> +int coresight_trace_id_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map)
>  {
>         unsigned long flags;
>         int id;
> @@ -195,8 +195,9 @@ static int coresight_trace_id_map_get_cpu_id(int cpu, struct coresight_trace_id_
>         DUMP_ID_MAP(id_map);
>         return id;
>  }
> +EXPORT_SYMBOL_GPL(coresight_trace_id_get_cpu_id);
>
> -static void coresight_trace_id_map_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map)
> +void coresight_trace_id_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map)
>  {
>         unsigned long flags;
>         int id;
> @@ -222,6 +223,7 @@ static void coresight_trace_id_map_put_cpu_id(int cpu, struct coresight_trace_id
>         DUMP_ID_CPU(cpu, id);
>         DUMP_ID_MAP(id_map);
>  }
> +EXPORT_SYMBOL_GPL(coresight_trace_id_put_cpu_id);
>
>  static int coresight_trace_id_map_get_system_id(struct coresight_trace_id_map *id_map)
>  {
> @@ -250,19 +252,11 @@ static void coresight_trace_id_map_put_system_id(struct coresight_trace_id_map *
>         DUMP_ID_MAP(id_map);
>  }
>
> -/* API functions */
> -

Rather than remove the existing default trace ID functions, simply add
a few new ones...

e.g. given the existing...

void coresight_trace_id_put_cpu_id(int cpu)
{
    coresight_trace_id_map_put_cpu_id(cpu, &id_map_default);
}
EXPORT_SYMBOL_GPL(coresight_trace_id_put_cpu_id);

add:-

void coresight_trace_id_put_cpu_id_map(int cpu, struct
coresight_trace_id_map *id_map)
{
    coresight_trace_id_map_put_cpu_id(cpu, id_map);
}
EXPORT_SYMBOL_GPL(coresight_trace_id_put_cpu_id_map);

This avoids a whole lot of churn in exposing the default map to
external functions, putting it in there and then removing it later.
When any location that was using coresight_trace_id_put_cpu_id() needs
to supply its own map, change the function name at that point to
coresight_trace_id_put_cpu_id_map()

Mike


> -int coresight_trace_id_get_cpu_id(int cpu)
> -{
> -       return coresight_trace_id_map_get_cpu_id(cpu, &id_map_default);
> -}
> -EXPORT_SYMBOL_GPL(coresight_trace_id_get_cpu_id);
> -
> -void coresight_trace_id_put_cpu_id(int cpu)
> +struct coresight_trace_id_map *coresight_trace_id_map_default(void)
>  {
> -       coresight_trace_id_map_put_cpu_id(cpu, &id_map_default);
> +       return &id_map_default;
>  }
> -EXPORT_SYMBOL_GPL(coresight_trace_id_put_cpu_id);
> +EXPORT_SYMBOL_GPL(coresight_trace_id_map_default);
>
>  int coresight_trace_id_read_cpu_id(int cpu)
>  {
> diff --git a/drivers/hwtracing/coresight/coresight-trace-id.h b/drivers/hwtracing/coresight/coresight-trace-id.h
> index 49438a96fcc6..54b9d8ed903b 100644
> --- a/drivers/hwtracing/coresight/coresight-trace-id.h
> +++ b/drivers/hwtracing/coresight/coresight-trace-id.h
> @@ -42,7 +42,10 @@
>  #define IS_VALID_CS_TRACE_ID(id)       \
>         ((id > CORESIGHT_TRACE_ID_RES_0) && (id < CORESIGHT_TRACE_ID_RES_TOP))
>
> -/* Allocate and release IDs for a single default trace ID map */
> +/**
> + * Get the global map that's used by sysfs
> + */
> +struct coresight_trace_id_map *coresight_trace_id_map_default(void);
>
>  /**
>   * Read and optionally allocate a CoreSight trace ID and associate with a CPU.
> @@ -57,7 +60,7 @@
>   *
>   * return: CoreSight trace ID or -EINVAL if allocation impossible.
>   */
> -int coresight_trace_id_get_cpu_id(int cpu);
> +int coresight_trace_id_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map);
>
>  /**
>   * Release an allocated trace ID associated with the CPU.
> @@ -70,7 +73,7 @@ int coresight_trace_id_get_cpu_id(int cpu);
>   *
>   * @cpu: The CPU index to release the associated trace ID.
>   */
> -void coresight_trace_id_put_cpu_id(int cpu);
> +void coresight_trace_id_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map);
>
>  /**
>   * Read the current allocated CoreSight Trace ID value for the CPU.
> --
> 2.34.1
>


-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK

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